Daniel Henrique Barboza 9bb9d42429 target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[] ... Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Vladimir Isaev <vladimir.isaev@syntacore.com> tested-by tags added, rebased with Alistair's riscv-to-apply.next. Message-ID: <20240112140201.127083-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2024-02-09 20:37:51 +10:00
..
insn_trans	target/riscv: Check for 'A' extension on all atomic instructions	2024-02-09 10:37:59 +10:00
kvm	target/riscv: remove riscv_cpu_options[]	2024-02-09 11:13:08 +10:00
tcg	target/riscv: remove riscv_cpu_options[]	2024-02-09 11:13:08 +10:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h
cpu_cfg.h	target/riscv: rework 'vext_spec'	2024-02-09 10:49:31 +10:00
cpu_helper.c	target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index	2024-02-03 16:46:10 +10:00
cpu_user.h
cpu_vendorid.h
cpu-param.h
cpu-qom.h	target/riscv: add rva22s64 cpu	2024-01-10 18:47:47 +10:00
cpu.c	target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[]	2024-02-09 20:37:51 +10:00
cpu.h	target/riscv: remove riscv_cpu_options[]	2024-02-09 11:13:08 +10:00
crypto_helper.c
csr.c	target/riscv: Assert that the CSR numbers will be correct	2024-01-10 18:47:47 +10:00
debug.c
debug.h
fpu_helper.c
gdbstub.c
helper.h
insn16.decode
insn32.decode	target/riscv: Add support for Zacas extension	2024-01-10 18:47:47 +10:00
instmap.h
internals.h	target/riscv: Use env_archcpu() in [check_]nanbox()	2023-11-07 12:13:27 +01:00
Kconfig
m128_helper.c
machine.c	target/riscv: Constify VMState in machine.c	2023-12-29 11:17:30 +11:00
meson.build
monitor.c
op_helper.c	target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index	2024-02-03 16:46:10 +10:00
pmp.c	target/riscv: pmp: Ignore writes when RW=01 and MML=0	2024-01-10 18:47:47 +10:00
pmp.h	target/riscv/pmp: Use hwaddr instead of target_ulong for RV32	2024-01-10 18:47:46 +10:00
pmu.c	target/riscv: Add "pmu-mask" property to replace "pmu-num"	2023-11-07 11:06:02 +10:00
pmu.h	target/riscv: Use existing PMU counter mask in FDT generation	2023-11-07 11:06:02 +10:00
riscv-qmp-cmds.c	riscv-qmp-cmds.c: add profile flags in cpu-model-expansion	2024-01-10 18:47:47 +10:00
sbi_ecall_interface.h
time_helper.c
time_helper.h
trace-events
trace.h
translate.c	target: Use vaddr in gen_intermediate_code	2024-01-29 07:06:03 +10:00
vcrypto_helper.c
vector_helper.c	target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index	2024-02-03 16:46:10 +10:00
vector_internals.c	riscv: Clean up includes	2024-01-30 21:20:20 +03:00
vector_internals.h	riscv: Clean up includes	2024-01-30 21:20:20 +03:00
xthead.decode
XVentanaCondOps.decode
zce_helper.c