9be8a82c0e
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented. The SPL boot for Cubieboard expects AXP209 PMIC on TWI0/I2C0 bus, so this is first part enabling the TWI/I2C bus operation. Since both Allwinner A10 and H3 use the same module, it is added for both boards. Docs are also updated for Cubieboard and Orangepi-PC board to indicate I2C availability. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
41 lines
2.3 KiB
Plaintext
41 lines
2.3 KiB
Plaintext
# See docs/devel/tracing.rst for syntax documentation.
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# core.c
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i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)"
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i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x"
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i2c_send_async(uint8_t address, uint8_t data) "send_async(addr:0x%02x) data:0x%02x"
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i2c_recv(uint8_t address, uint8_t data) "recv(addr:0x%02x) data:0x%02x"
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i2c_ack(void) ""
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# allwinner_i2c.c
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allwinner_i2c_read(const char* reg_name, uint64_t offset, uint64_t value) "read %s [0x%" PRIx64 "]: -> 0x%" PRIx64
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allwinner_i2c_write(const char* reg_name, uint64_t offset, uint64_t value) "write %s [0x%" PRIx64 "]: <- 0x%" PRIx64
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# aspeed_i2c.c
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aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) "handling cmd=0x%x %s count=%d intr=0x%x"
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aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) "handled intr=0x%x %s"
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aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64
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aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64
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aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) "%s send %d/%d 0x%02x"
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aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) "%s recv %d/%d 0x%02x"
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# npcm7xx_smbus.c
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npcm7xx_smbus_read(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
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npcm7xx_smbus_write(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
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npcm7xx_smbus_start(const char *id, int success) "%s starting, success: %d"
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npcm7xx_smbus_send_address(const char *id, uint8_t addr, int recv, int success) "%s sending address: 0x%02x, recv: %d, success: %d"
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npcm7xx_smbus_send_byte(const char *id, uint8_t value, int success) "%s send byte: 0x%02x, success: %d"
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npcm7xx_smbus_recv_byte(const char *id, uint8_t value) "%s recv byte: 0x%02x"
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npcm7xx_smbus_stop(const char *id) "%s stopping"
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npcm7xx_smbus_nack(const char *id) "%s nacking"
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npcm7xx_smbus_recv_fifo(const char *id, uint8_t received, uint8_t expected) "%s recv fifo: received %u, expected %u"
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# i2c-mux-pca954x.c
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pca954x_write_bytes(uint8_t value) "PCA954X write data: 0x%02x"
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pca954x_read_data(uint8_t value) "PCA954X read data: 0x%02x"
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