qemu-e2k/target-arm
Sergey Sorokin 1b4093ea66 target-arm: Fix translation level on early translation faults
Qemu reports translation fault on 1st level instead of 0th level in case of
AArch64 address translation if the translation table walk is disabled or
the address is in the gap between the two regions.

Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id: 1457527503-25958-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16 17:42:18 +00:00
..
arch_dump.c
arm_ldst.h
arm-semi.c
cpu64.c
cpu-qom.h
cpu.c
cpu.h target-arm: implement BE32 mode in system emulation 2016-03-04 11:30:21 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c target-arm: Fix translation level on early translation faults 2016-03-16 17:42:18 +00:00
helper.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2016-03-16 17:05:58 +00:00
internals.h
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c target-arm: Implement MRS (banked) and MSR (banked) instructions 2016-03-16 17:05:58 +00:00
psci.c
translate-a64.c target-arm: introduce tbflag for endianness 2016-03-04 11:30:20 +00:00
translate.c target-arm: Implement MRS (banked) and MSR (banked) instructions 2016-03-16 17:05:58 +00:00
translate.h target-arm: introduce disas flag for endianness 2016-03-04 11:30:20 +00:00