qemu-e2k/tests
Zhuojia Shen bc6bd20ee3 target/arm: align exposed ID registers with Linux
In CPUID registers exposed to userspace, some registers were missing
and some fields were not exposed.  This patch aligns exposed ID
registers and their fields with what the upstream kernel currently
exposes.

Specifically, the following new ID registers/fields are exposed to
userspace:

ID_AA64PFR1_EL1.BT:       bits 3-0
ID_AA64PFR1_EL1.MTE:      bits 11-8
ID_AA64PFR1_EL1.SME:      bits 27-24

ID_AA64ZFR0_EL1.SVEver:   bits 3-0
ID_AA64ZFR0_EL1.AES:      bits 7-4
ID_AA64ZFR0_EL1.BitPerm:  bits 19-16
ID_AA64ZFR0_EL1.BF16:     bits 23-20
ID_AA64ZFR0_EL1.SHA3:     bits 35-32
ID_AA64ZFR0_EL1.SM4:      bits 43-40
ID_AA64ZFR0_EL1.I8MM:     bits 47-44
ID_AA64ZFR0_EL1.F32MM:    bits 55-52
ID_AA64ZFR0_EL1.F64MM:    bits 59-56

ID_AA64SMFR0_EL1.F32F32:  bit 32
ID_AA64SMFR0_EL1.B16F32:  bit 34
ID_AA64SMFR0_EL1.F16F32:  bit 35
ID_AA64SMFR0_EL1.I8I32:   bits 39-36
ID_AA64SMFR0_EL1.F64F64:  bit 48
ID_AA64SMFR0_EL1.I16I64:  bits 55-52
ID_AA64SMFR0_EL1.FA64:    bit 63

ID_AA64MMFR0_EL1.ECV:     bits 63-60

ID_AA64MMFR1_EL1.AFP:     bits 47-44

ID_AA64MMFR2_EL1.AT:      bits 35-32

ID_AA64ISAR0_EL1.RNDR:    bits 63-60

ID_AA64ISAR1_EL1.FRINTTS: bits 35-32
ID_AA64ISAR1_EL1.BF16:    bits 47-44
ID_AA64ISAR1_EL1.DGH:     bits 51-48
ID_AA64ISAR1_EL1.I8MM:    bits 55-52

ID_AA64ISAR2_EL1.WFxT:    bits 3-0
ID_AA64ISAR2_EL1.RPRES:   bits 7-4
ID_AA64ISAR2_EL1.GPA3:    bits 11-8
ID_AA64ISAR2_EL1.APA3:    bits 15-12

The code is also refactored to use symbolic names for ID register fields
for better readability and maintainability.

The test case in tests/tcg/aarch64/sysregs.c is also updated to match
the intended behavior.

Signed-off-by: Zhuojia Shen <chaosdefinition@hotmail.com>
Message-id: DS7PR12MB6309FB585E10772928F14271ACE79@DS7PR12MB6309.namprd12.prod.outlook.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: use Sn_n_Cn_Cn_n syntax to work with older assemblers
that don't recognize id_aa64isar2_el1 and id_aa64mmfr2_el1]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-05 14:12:34 +00:00
..
avocado acpi/tests/avocado/bits: add mformat as one of the dependencies 2022-12-21 07:32:24 -05:00
bench cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
data tests: acpi: x86: update expected DSDT after moving PRQx fields in _SB scope 2022-11-22 05:19:00 -05:00
decode
docker tests/docker: use prebuilt toolchain for debian-hexagon-cross 2022-12-23 15:16:31 +00:00
fp meson: remove dead assignments 2022-09-01 07:42:37 +02:00
guest-debug
image-fuzzer
include
keys
lcitool ci: replace x86_64 macos-11 with aarch64 macos-12 2022-11-17 09:58:11 +01:00
migration tests/migration: remove the unused local variable 2022-10-11 12:37:12 +02:00
multiboot
perf/block/qcow2
plugin
qapi-schema meson: remove dead assignments 2022-09-01 07:42:37 +02:00
qemu-iotests tests/stream-under-throttle: New test 2022-11-14 11:31:52 +01:00
qtest hw/acpi: Rename tco.c -> ich9_tco.c 2022-12-21 07:32:24 -05:00
rocker
tcg target/arm: align exposed ID registers with Linux 2023-01-05 14:12:34 +00:00
tsan
uefi-test-tools
unit util: Add interval-tree.c 2022-12-20 17:09:41 -08:00
vm FreeBSD: Upgrade to 12.4 release 2022-12-15 15:19:24 +01:00
vmstate-static-checker-data
check-block.sh
dbus-vmstate-daemon.sh
Makefile.include configure: move tests/tcg/Makefile.prereqs to root build directory 2022-10-06 11:53:40 +01:00
meson.build
requirements.txt
test-qht-par.c
vhost-user-bridge.c tests: vhost-user-bridge: Avoid using hardcoded /tmp 2022-09-27 20:51:20 +02:00