d46a0bb24d
This changes qcow2 to implement the byte-based .bdrv_co_pwritev interface rather than the sector-based old one. As preallocation uses the same allocation function as normal writes, and the interface of that function needs to be changed, it is converted in the same patch. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2167 lines
147 KiB
Plaintext
2167 lines
147 KiB
Plaintext
# Trace events for debugging and performance instrumentation
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#
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# This file is processed by the tracetool script during the build.
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#
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# To add a new trace event:
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#
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# 1. Choose a name for the trace event. Declare its arguments and format
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# string.
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#
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# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
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# trace_multiwrite_cb(). The source file must #include "trace.h".
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#
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# Format of a trace event:
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#
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# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
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#
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# Example: g_malloc(size_t size) "size %zu"
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#
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# The "disable" keyword will build without the trace event.
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#
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# The <name> must be a valid as a C function name.
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#
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# Types should be standard C types. Use void * for pointers because the trace
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# system may not have the necessary headers included.
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#
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# The <format-string> should be a sprintf()-compatible format string.
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# util/oslib-win32.c
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# util/oslib-posix.c
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qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
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qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p"
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qemu_vfree(void *ptr) "ptr %p"
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qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu"
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# hw/virtio/virtio.c
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virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
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virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
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virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
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virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
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virtio_irq(void *vq) "vq %p"
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virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
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virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
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# hw/virtio/virtio-rng.c
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virtio_rng_guest_not_ready(void *rng) "rng %p: guest not ready"
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virtio_rng_pushed(void *rng, size_t len) "rng %p: %zd bytes pushed"
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virtio_rng_request(void *rng, size_t size, unsigned quota) "rng %p: %zd bytes requested, %u bytes quota left"
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# hw/char/virtio-serial-bus.c
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virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
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virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
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virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
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virtio_serial_handle_control_message_port(unsigned int port) "port %u"
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# hw/char/virtio-console.c
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virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
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virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
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virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
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# block.c
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bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
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bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
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# block/block-backend.c
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blk_co_preadv(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags %x"
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blk_co_pwritev(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags %x"
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# block/io.c
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bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
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bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
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bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
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bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
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bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
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bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
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bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int count, int flags) "bs %p offset %"PRId64" count %d flags %#x"
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bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d"
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# block/stream.c
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stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
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stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
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# block/commit.c
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commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
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commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
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# block/mirror.c
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mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p"
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mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64
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mirror_before_flush(void *s) "s %p"
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mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64
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mirror_before_sleep(void *s, int64_t cnt, int synced, uint64_t delay_ns) "s %p dirty count %"PRId64" synced %d delay %"PRIu64"ns"
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mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d"
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mirror_iteration_done(void *s, int64_t sector_num, int nb_sectors, int ret) "s %p sector_num %"PRId64" nb_sectors %d ret %d"
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mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d"
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mirror_yield_in_flight(void *s, int64_t sector_num, int in_flight) "s %p sector_num %"PRId64" in_flight %d"
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mirror_yield_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
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mirror_break_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
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# block/backup.c
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backup_do_cow_enter(void *job, int64_t start, int64_t sector_num, int nb_sectors) "job %p start %"PRId64" sector_num %"PRId64" nb_sectors %d"
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backup_do_cow_return(void *job, int64_t sector_num, int nb_sectors, int ret) "job %p sector_num %"PRId64" nb_sectors %d ret %d"
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backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64
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backup_do_cow_process(void *job, int64_t start) "job %p start %"PRId64
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backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
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backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
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# blockdev.c
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qmp_block_job_cancel(void *job) "job %p"
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qmp_block_job_pause(void *job) "job %p"
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qmp_block_job_resume(void *job) "job %p"
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qmp_block_job_complete(void *job) "job %p"
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block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
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qmp_block_stream(void *bs, void *job) "bs %p job %p"
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# hw/block/virtio-blk.c
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virtio_blk_req_complete(void *req, int status) "req %p status %d"
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virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
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virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
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virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
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virtio_blk_submit_multireq(void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) "mrb %p start %d num_reqs %d offset %"PRIu64" size %zu is_write %d"
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# hw/block/dataplane/virtio-blk.c
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virtio_blk_data_plane_start(void *s) "dataplane %p"
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virtio_blk_data_plane_stop(void *s) "dataplane %p"
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virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
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# thread-pool.c
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thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
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thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
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thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
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# block/raw-win32.c
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# block/raw-posix.c
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paio_submit_co(int64_t offset, int count, int type) "offset %"PRId64" count %d type %d"
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paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
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# ioport.c
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cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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# balloon.c
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# Since requests are raised via monitor, not many tracepoints are needed.
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balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
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virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
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virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
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virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
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virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
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# hw/intc/apic_common.c
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cpu_set_apic_base(uint64_t val) "%016"PRIx64
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cpu_get_apic_base(uint64_t val) "%016"PRIx64
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# coalescing
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apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
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apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
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apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
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# hw/intc/apic.c
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apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
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apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
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apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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# hw/audio/cs4231.c
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cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
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cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
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cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
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cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
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# hw/nvram/ds1225y.c
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nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
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nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
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# hw/misc/eccmemctl.c
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ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
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ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
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ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
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ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
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ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
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ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
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ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
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ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
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ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
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ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
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ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
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ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
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ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
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ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
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ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
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ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
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ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
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# hw/nvram/fw_cfg.c
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fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
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fw_cfg_read(void *s, uint64_t ret) "%p = %"PRIx64
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fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
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# hw/block/hd-geometry.c
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hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) "blk %p LCHS %d %d %d"
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hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "blk %p CHS %u %u %u trans %d"
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# hw/display/jazz_led.c
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jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
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jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
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# hw/display/xenfb.c
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xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs %#x abs %d"
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xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
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# hw/net/lance.c
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lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
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lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
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# hw/intc/slavio_intctl.c
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slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
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slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
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slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
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slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
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slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
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slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
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slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
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slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
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slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
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slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
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slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
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slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
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# hw/input/ps2.c
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ps2_put_keycode(void *opaque, int keycode) "%p keycode %d"
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ps2_read_data(void *opaque) "%p"
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ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
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ps2_reset_keyboard(void *s) "%p"
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ps2_write_keyboard(void *opaque, int val) "%p val %d"
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ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
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ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs %#x"
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ps2_mouse_event_disabled(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
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ps2_mouse_event(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
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ps2_mouse_fake_event(void *opaque) "%p"
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ps2_write_mouse(void *opaque, int val) "%p val %d"
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ps2_kbd_reset(void *opaque) "%p"
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ps2_mouse_reset(void *opaque) "%p"
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ps2_kbd_init(void *s) "%p"
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ps2_mouse_init(void *s) "%p"
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# hw/misc/slavio_misc.c
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slavio_misc_update_irq_raise(void) "Raise IRQ"
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slavio_misc_update_irq_lower(void) "Lower IRQ"
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slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
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slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
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slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
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slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
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slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
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slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
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slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
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slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
|
|
slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
|
|
slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
|
|
slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
|
|
apc_mem_writeb(uint32_t val) "Write power management %02x"
|
|
apc_mem_readb(uint32_t ret) "Read power management %02x"
|
|
slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
|
|
slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
|
|
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
|
|
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
|
|
|
|
# hw/timer/slavio_timer.c
|
|
slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
|
|
slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
|
|
slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
|
|
slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
|
|
slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
|
|
slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
|
|
slavio_timer_mem_writel_counter_invalid(void) "not user timer"
|
|
slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
|
|
slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
|
|
slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
|
|
slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
|
|
slavio_timer_mem_writel_mode_invalid(void) "not system timer"
|
|
slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
|
|
|
|
# hw/dma/rc4030.c
|
|
jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
|
|
jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
|
|
rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
|
|
rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
|
|
|
|
# hw/dma/sparc32_dma.c
|
|
ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
|
|
ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
|
|
sparc32_dma_set_irq_raise(void) "Raise IRQ"
|
|
sparc32_dma_set_irq_lower(void) "Lower IRQ"
|
|
espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
|
|
espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
|
|
sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
|
|
sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
|
|
sparc32_dma_enable_raise(void) "Raise DMA enable"
|
|
sparc32_dma_enable_lower(void) "Lower DMA enable"
|
|
|
|
# hw/sparc/sun4m.c
|
|
sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
|
|
sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
|
|
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
|
|
sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
|
|
|
|
# hw/dma/sun4m_iommu.c
|
|
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
|
|
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
|
|
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
|
|
sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
|
|
sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
|
|
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
|
|
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
|
|
sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
|
|
|
|
# hw/usb/core.c
|
|
usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
|
|
usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s"
|
|
|
|
# hw/usb/bus.c
|
|
usb_port_claim(int bus, const char *port) "bus %d, port %s"
|
|
usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s"
|
|
usb_port_detach(int bus, const char *port) "bus %d, port %s"
|
|
usb_port_release(int bus, const char *port) "bus %d, port %s"
|
|
|
|
# hw/usb/hcd-ohci.c
|
|
usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at %x"
|
|
usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d"
|
|
usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x"
|
|
usb_ohci_iso_td_relative_frame_number_neg(int rel) "ISO_TD R=%d < 0"
|
|
usb_ohci_iso_td_relative_frame_number_big(int rel, int count) "ISO_TD R=%d > FC=%d"
|
|
usb_ohci_iso_td_bad_direction(int dir) "Bad direction %d"
|
|
usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) "ISO_TD bp 0x%.8x be 0x%.8x"
|
|
usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) "ISO_TD cc != not accessed 0x%.8x 0x%.8x"
|
|
usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) "ISO_TD start_offset=0x%.8x > next_offset=0x%.8x"
|
|
usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndir %s len %zu ret %d"
|
|
usb_ohci_iso_td_data_overrun(int ret, ssize_t len) "DataOverrun %d > %zu"
|
|
usb_ohci_iso_td_data_underrun(int ret) "DataUnderrun %d"
|
|
usb_ohci_iso_td_nak(int ret) "got NAK/STALL %d"
|
|
usb_ohci_iso_td_bad_response(int ret) "Bad device response %d"
|
|
usb_ohci_port_attach(int index) "port #%d"
|
|
usb_ohci_port_detach(int index) "port #%d"
|
|
usb_ohci_port_wakeup(int index) "port #%d"
|
|
usb_ohci_port_suspend(int index) "port #%d"
|
|
usb_ohci_port_reset(int index) "port #%d"
|
|
usb_ohci_remote_wakeup(const char *s) "%s: SUSPEND->RESUME"
|
|
usb_ohci_reset(const char *s) "%s"
|
|
usb_ohci_start(const char *s) "%s: USB Operational"
|
|
usb_ohci_resume(const char *s) "%s: USB Resume"
|
|
usb_ohci_stop(const char *s) "%s: USB Suspended"
|
|
usb_ohci_exit(const char *s) "%s"
|
|
usb_ohci_set_ctl(const char *s, uint32_t new_state) "%s: new state 0x%x"
|
|
usb_ohci_td_underrun(void) ""
|
|
usb_ohci_td_dev_error(void) ""
|
|
usb_ohci_td_nak(void) ""
|
|
usb_ohci_td_stall(void) ""
|
|
usb_ohci_td_babble(void) ""
|
|
usb_ohci_td_bad_device_response(int rc) "%d"
|
|
usb_ohci_td_read_error(uint32_t addr) "TD read error at %x"
|
|
usb_ohci_td_bad_direction(int dir) "Bad direction %d"
|
|
usb_ohci_td_skip_async(void) ""
|
|
usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) " TD @ 0x%.8x %" PRId64 " of %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x"
|
|
usb_ohci_td_pkt_short(const char *dir, const char *buf) "%s data: %s"
|
|
usb_ohci_td_pkt_full(const char *dir, const char *buf) "%s data: %s"
|
|
usb_ohci_td_too_many_pending(void) ""
|
|
usb_ohci_td_packet_status(int status) "status=%d"
|
|
usb_ohci_ed_read_error(uint32_t addr) "ED read error at %x"
|
|
usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=0x%.8x"
|
|
usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) "fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u"
|
|
usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at %x"
|
|
usb_ohci_mem_read_unaligned(uint32_t addr) "at %x"
|
|
usb_ohci_mem_read_bad_offset(uint32_t addr) "%x"
|
|
usb_ohci_mem_write_unaligned(uint32_t addr) "at %x"
|
|
usb_ohci_mem_write_bad_offset(uint32_t addr) "%x"
|
|
usb_ohci_process_lists(uint32_t head, uint32_t cur) "head %x, cur %x"
|
|
usb_ohci_bus_eof_timer_failed(const char *name) "%s: timer_new_ns failed"
|
|
usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) "%s: FrameInterval = 0x%x (%u)"
|
|
usb_ohci_hub_power_up(void) "powered up all ports"
|
|
usb_ohci_hub_power_down(void) "powered down all ports"
|
|
usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64
|
|
usb_ohci_die(void) ""
|
|
usb_ohci_async_complete(void) ""
|
|
|
|
# hw/usb/hcd-ehci.c
|
|
usb_ehci_reset(void) "=== RESET ==="
|
|
usb_ehci_unrealize(void) "=== UNREALIZE ==="
|
|
usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
|
|
usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
|
|
usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
|
|
usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x"
|
|
usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x"
|
|
usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)"
|
|
usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
|
|
usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
|
|
usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
|
|
usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
|
|
usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
|
|
usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
|
|
usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
|
|
usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
|
|
usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
|
|
usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
|
|
usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
|
|
usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
|
|
usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
|
|
usb_ehci_port_suspend(uint32_t port) "port #%d"
|
|
usb_ehci_port_wakeup(uint32_t port) "port #%d"
|
|
usb_ehci_port_resume(uint32_t port) "port #%d"
|
|
usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
|
|
usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
|
|
usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
|
|
usb_ehci_guest_bug(const char *reason) "%s"
|
|
usb_ehci_doorbell_ring(void) ""
|
|
usb_ehci_doorbell_ack(void) ""
|
|
usb_ehci_dma_error(void) ""
|
|
|
|
# hw/usb/hcd-uhci.c
|
|
usb_uhci_reset(void) "=== RESET ==="
|
|
usb_uhci_exit(void) "=== EXIT ==="
|
|
usb_uhci_schedule_start(void) ""
|
|
usb_uhci_schedule_stop(void) ""
|
|
usb_uhci_frame_start(uint32_t num) "nr %d"
|
|
usb_uhci_frame_stop_bandwidth(void) ""
|
|
usb_uhci_frame_loop_stop_idle(void) ""
|
|
usb_uhci_frame_loop_continue(void) ""
|
|
usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
|
|
usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
|
|
usb_uhci_queue_add(uint32_t token) "token 0x%x"
|
|
usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s"
|
|
usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d"
|
|
usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
|
|
usb_uhci_qh_load(uint32_t qh) "qh 0x%x"
|
|
usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
|
|
usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
|
|
usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
|
|
usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
|
|
usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
|
|
|
|
# hw/usb/hcd-xhci.c
|
|
usb_xhci_reset(void) "=== RESET ==="
|
|
usb_xhci_exit(void) "=== EXIT ==="
|
|
usb_xhci_run(void) ""
|
|
usb_xhci_stop(void) ""
|
|
usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
|
|
usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
|
|
usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x"
|
|
usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
|
|
usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
|
|
usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
|
|
usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x"
|
|
usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
|
|
usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
|
|
usb_xhci_irq_intx(uint32_t level) "level %d"
|
|
usb_xhci_irq_msi(uint32_t nr) "nr %d"
|
|
usb_xhci_irq_msix(uint32_t nr) "nr %d"
|
|
usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
|
|
usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
|
|
usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
|
|
usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
|
|
usb_xhci_port_reset(uint32_t port, bool warm) "port %d, warm %d"
|
|
usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d"
|
|
usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits %x"
|
|
usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
|
|
usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
|
|
usb_xhci_slot_address(uint32_t slotid, const char *port) "slotid %d, port %s"
|
|
usb_xhci_slot_configure(uint32_t slotid) "slotid %d"
|
|
usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d"
|
|
usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
|
|
usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
|
|
usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
|
|
usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr %016" PRIx64
|
|
usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d"
|
|
usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
|
|
usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
|
|
usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) "slotid %d, epid %d, %s -> %s"
|
|
usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d"
|
|
usb_xhci_xfer_async(void *xfer) "%p"
|
|
usb_xhci_xfer_nak(void *xfer) "%p"
|
|
usb_xhci_xfer_retry(void *xfer) "%p"
|
|
usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d"
|
|
usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
|
|
usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)"
|
|
|
|
# hw/usb/desc.c
|
|
usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
|
|
usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
|
|
usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
|
|
usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
|
|
usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
|
|
usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d"
|
|
usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0x%x, len %d, ret %d"
|
|
usb_set_addr(int addr) "dev %d"
|
|
usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
|
|
usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
|
|
usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
|
|
usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
|
|
|
|
# hw/usb/dev-hub.c
|
|
usb_hub_reset(int addr) "dev %d"
|
|
usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d"
|
|
usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x"
|
|
usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
|
|
usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
|
|
usb_hub_attach(int addr, int nr) "dev %d, port %d"
|
|
usb_hub_detach(int addr, int nr) "dev %d, port %d"
|
|
usb_hub_status_report(int addr, int status) "dev %d, status 0x%x"
|
|
|
|
# hw/usb/dev-uas.c
|
|
usb_uas_reset(int addr) "dev %d"
|
|
usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x"
|
|
usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x"
|
|
usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x"
|
|
usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
|
|
usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
|
|
usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d"
|
|
usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d"
|
|
usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d"
|
|
usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x"
|
|
usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d"
|
|
usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
|
|
|
|
# hw/usb/dev-mtp.c
|
|
usb_mtp_reset(int addr) "dev %d"
|
|
usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x"
|
|
usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x"
|
|
usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x"
|
|
usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) "dev %d, trans 0x%x, len %d"
|
|
usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, ep %d, %d/%d"
|
|
usb_mtp_nak(int dev, uint32_t ep) "dev %d, ep %d"
|
|
usb_mtp_stall(int dev, const char *reason) "dev %d, reason: %s"
|
|
usb_mtp_op_get_device_info(int dev) "dev %d"
|
|
usb_mtp_op_open_session(int dev) "dev %d"
|
|
usb_mtp_op_close_session(int dev) "dev %d"
|
|
usb_mtp_op_get_storage_ids(int dev) "dev %d"
|
|
usb_mtp_op_get_storage_info(int dev) "dev %d"
|
|
usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) "dev %d, handle 0x%x, path %s, off %d, len %d"
|
|
usb_mtp_op_unknown(int dev, uint32_t code) "dev %d, command code 0x%x"
|
|
usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
|
|
usb_mtp_inotify_event(int dev, const char *path, uint32_t mask, const char *s) "dev %d, path %s mask 0x%x event %s"
|
|
|
|
# hw/usb/host-libusb.c
|
|
usb_host_open_started(int bus, int addr) "dev %d:%d"
|
|
usb_host_open_success(int bus, int addr) "dev %d:%d"
|
|
usb_host_open_failure(int bus, int addr) "dev %d:%d"
|
|
usb_host_close(int bus, int addr) "dev %d:%d"
|
|
usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
|
|
usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
|
|
usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
|
|
usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
|
|
usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
|
|
usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d"
|
|
usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d"
|
|
usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
|
|
usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
|
|
usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d"
|
|
usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
|
|
usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
|
|
usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
|
|
usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
|
|
usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d"
|
|
usb_host_reset(int bus, int addr) "dev %d:%d"
|
|
usb_host_auto_scan_enabled(void)
|
|
usb_host_auto_scan_disabled(void)
|
|
usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
|
|
usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d"
|
|
usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d"
|
|
usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
|
|
|
|
# hw/scsi/scsi-bus.c
|
|
scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
|
|
scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
|
|
scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
|
|
scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
|
|
scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
|
|
scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
|
|
scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x"
|
|
scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
|
|
scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
|
|
# vl.c
|
|
vm_state_notify(int running, int reason) "running %d reason %d"
|
|
load_file(const char *name, const char *path) "name %s location %s"
|
|
runstate_set(int new_state) "new state %d"
|
|
system_wakeup_request(int reason) "reason=%d"
|
|
qemu_system_shutdown_request(void) ""
|
|
qemu_system_powerdown_request(void) ""
|
|
|
|
# block/qcow2.c
|
|
qcow2_writev_start_req(void *co, int64_t offset, int bytes) "co %p offset %" PRIx64 " bytes %d"
|
|
qcow2_writev_done_req(void *co, int ret) "co %p ret %d"
|
|
qcow2_writev_start_part(void *co) "co %p"
|
|
qcow2_writev_done_part(void *co, int cur_bytes) "co %p cur_bytes %d"
|
|
qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
|
|
qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int count) "co %p offset %" PRIx64 " count %d"
|
|
qcow2_pwrite_zeroes(void *co, int64_t offset, int count) "co %p offset %" PRIx64 " count %d"
|
|
|
|
# block/qcow2-cluster.c
|
|
qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) "co %p offset %" PRIx64 " bytes %d"
|
|
qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
|
|
qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
|
|
qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d"
|
|
qcow2_cluster_alloc_phys(void *co) "co %p"
|
|
qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d"
|
|
|
|
qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d"
|
|
qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d"
|
|
qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
|
|
qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
|
|
qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
|
|
|
|
# block/qcow2-cache.c
|
|
qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
|
|
qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
|
|
qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
|
|
qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d"
|
|
qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d"
|
|
qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d"
|
|
|
|
# block/qed-l2-cache.c
|
|
qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
|
|
qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
|
|
qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
|
|
|
|
# block/qed-table.c
|
|
qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
|
|
qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
|
|
qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
|
|
qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
|
|
|
|
# block/qed.c
|
|
qed_need_check_timer_cb(void *s) "s %p"
|
|
qed_start_need_check_timer(void *s) "s %p"
|
|
qed_cancel_need_check_timer(void *s) "s %p"
|
|
qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
|
|
qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x"
|
|
qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
|
|
qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
|
|
qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
|
|
qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
|
|
# hw/display/g364fb.c
|
|
g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
|
|
g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
|
|
|
|
# hw/timer/grlib_gptimer.c
|
|
grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
|
|
grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
|
|
grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
|
|
grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
|
|
grlib_gptimer_hit(int id) "timer:%d HIT"
|
|
grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
|
|
grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
|
|
|
|
# hw/intc/grlib_irqmp.c
|
|
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
|
|
grlib_irqmp_ack(int intno) "interrupt:%d"
|
|
grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
|
|
grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
|
|
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
|
|
|
# hw/char/grlib_apbuart.c
|
|
grlib_apbuart_event(int event) "event:%d"
|
|
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
|
grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
|
|
|
|
# hw/sparc/leon3.c
|
|
leon3_set_irq(int intno) "Set CPU IRQ %d"
|
|
leon3_reset_irq(int intno) "Reset CPU IRQ %d"
|
|
|
|
# spice-qemu-char.c
|
|
spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
|
|
spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
|
|
spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
|
|
spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
|
|
spice_vmc_event(int event) "spice vmc event %d"
|
|
|
|
# hw/intc/lm32_pic.c
|
|
lm32_pic_raise_irq(void) "Raise CPU interrupt"
|
|
lm32_pic_lower_irq(void) "Lower CPU interrupt"
|
|
lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
|
|
lm32_pic_set_im(uint32_t im) "im 0x%08x"
|
|
lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
|
|
lm32_pic_get_im(uint32_t im) "im 0x%08x"
|
|
lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
|
|
|
|
# hw/char/lm32_juart.c
|
|
lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
|
|
lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
|
|
lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
|
|
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
|
|
|
|
# hw/timer/lm32_timer.c
|
|
lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
lm32_timer_hit(void) "timer hit"
|
|
lm32_timer_irq_state(int level) "irq state %d"
|
|
|
|
# hw/char/lm32_uart.c
|
|
lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
lm32_uart_irq_state(int level) "irq state %d"
|
|
|
|
# hw/scsi/mptsas.c
|
|
mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status %x resid %d"
|
|
mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
|
|
mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
|
|
mptsas_irq_intx(void *dev, int level) "dev %p level %d"
|
|
mptsas_irq_msi(void *dev) "dev %p "
|
|
mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
|
|
mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x"
|
|
mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
|
|
mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
|
|
mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d context 0x%08x\n"
|
|
mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) "dev %p dev %d:%d:%d length %"PRIu64""
|
|
mptsas_reset(void *dev) "dev %p "
|
|
mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
|
|
mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
|
|
mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd %x"
|
|
mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x"
|
|
|
|
# hw/scsi/mptconfig.c
|
|
mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
|
|
mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
|
|
|
|
# hw/scsi/megasas.c
|
|
megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
|
|
megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
|
|
megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
|
|
megasas_initq_mapped(uint64_t pa) "queue already mapped at %" PRIx64
|
|
megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
|
|
megasas_qf_mapped(unsigned int index) "skip mapped frame %x"
|
|
megasas_qf_new(unsigned int index, uint64_t frame) "frame %x addr %" PRIx64
|
|
megasas_qf_busy(unsigned long pa) "all frames busy for frame %lx"
|
|
megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame %x count %d context %" PRIx64 " head %x tail %x busy %d"
|
|
megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head %x tail %x busy %d"
|
|
megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
|
|
megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
|
|
megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context %" PRIx64 " head %x tail %x busy %d"
|
|
megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
|
|
megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd %x"
|
|
megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
|
|
megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x"
|
|
megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
|
|
megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
|
|
megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
|
|
megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
|
|
megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
|
|
megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x"
|
|
megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
|
|
megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
|
|
megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
|
|
megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: status %x, len %u/%u"
|
|
megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: status %x, residual %d"
|
|
megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
|
|
megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
|
|
megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
|
|
megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
|
|
megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes"
|
|
megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
|
|
megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
|
|
megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
|
|
megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
|
|
megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
|
|
megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
|
|
megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
|
|
megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s"
|
|
megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
|
|
megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd %x lun %d"
|
|
megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD %x"
|
|
megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
|
|
megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
|
|
megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d"
|
|
megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: xfer len %ld, max %ld"
|
|
megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
|
|
megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld"
|
|
megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
|
|
megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
|
|
megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
|
|
megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d"
|
|
megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: query flags %x"
|
|
megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d"
|
|
megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags %x"
|
|
megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d"
|
|
megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld"
|
|
megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame %x"
|
|
megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64
|
|
megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
|
|
megasas_reset(int fw_state) "firmware state %x"
|
|
megasas_init(int sges, int cmds, const char *mode) "Using %d sges, %d cmds, %s mode"
|
|
megasas_msix_raise(int vector) "vector %d"
|
|
megasas_msi_raise(int vector) "vector %d"
|
|
megasas_irq_lower(void) "INTx"
|
|
megasas_irq_raise(void) "INTx"
|
|
megasas_intr_enabled(void) "Interrupts enabled"
|
|
megasas_intr_disabled(void) "Interrupts disabled"
|
|
megasas_msix_enabled(int vector) "vector %d"
|
|
megasas_msi_enabled(int vector) "vector %d"
|
|
megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x"
|
|
megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
|
|
megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x"
|
|
megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
|
|
|
|
# hw/audio/milkymist-ac97.c
|
|
milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
|
|
milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
|
|
milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
|
|
milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
|
|
milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
|
|
milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
|
|
milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
|
|
milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
|
|
|
|
# hw/misc/milkymist-hpdmc.c
|
|
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
|
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
|
|
|
# hw/sd/milkymist-memcard.c
|
|
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
|
|
# hw/net/milkymist-minimac2.c
|
|
milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
|
|
milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
|
|
milkymist_minimac2_tx_frame(uint32_t length) "length %u"
|
|
milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
|
|
milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
|
|
milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
|
|
milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
|
|
milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
|
|
|
|
# hw/misc/milkymist-pfpu.c
|
|
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
|
|
milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/input/milkymist-softusb.c
|
|
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_softusb_mevt(uint8_t m) "m %d"
|
|
milkymist_softusb_kevt(uint8_t m) "m %d"
|
|
milkymist_softusb_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/timer/milkymist-sysctl.c
|
|
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_sysctl_icap_write(uint32_t value) "value %08x"
|
|
milkymist_sysctl_start_timer0(void) "Start timer0"
|
|
milkymist_sysctl_stop_timer0(void) "Stop timer0"
|
|
milkymist_sysctl_start_timer1(void) "Start timer1"
|
|
milkymist_sysctl_stop_timer1(void) "Stop timer1"
|
|
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
|
|
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
|
|
|
|
# hw/display/milkymist-tmu2.c
|
|
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_tmu2_start(void) "Start TMU"
|
|
milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/char/milkymist-uart.c
|
|
milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_uart_raise_irq(void) "Raise IRQ"
|
|
milkymist_uart_lower_irq(void) "Lower IRQ"
|
|
|
|
# hw/display/milkymist-vgafb.c
|
|
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
|
|
# hw/net/mipsnet.c
|
|
mipsnet_send(uint32_t size) "sending len=%u"
|
|
mipsnet_receive(uint32_t size) "receiving len=%u"
|
|
mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
|
|
mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
|
|
mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
|
|
|
|
# hw/isa/pc87312.c
|
|
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
|
|
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
|
|
pc87312_info_floppy(uint32_t base) "base 0x%x"
|
|
pc87312_info_ide(uint32_t base) "base 0x%x"
|
|
pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
|
|
pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
|
|
|
|
# hw/scsi/vmw_pvscsi.c
|
|
pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d"
|
|
pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d"
|
|
pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64
|
|
pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64
|
|
pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")"
|
|
pvscsi_update_irq_msi(void) "sending MSI notification"
|
|
pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx"
|
|
pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx"
|
|
pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u"
|
|
pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu"
|
|
pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)"
|
|
pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x"
|
|
pvscsi_command_complete_data_run(void) "not all data required for command transferred"
|
|
pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes"
|
|
pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul"
|
|
pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64
|
|
pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected"
|
|
pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected"
|
|
pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx"
|
|
pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored"
|
|
pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]"
|
|
pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived"
|
|
pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u"
|
|
pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64
|
|
pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x"
|
|
pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64
|
|
pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64
|
|
pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64
|
|
pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes"
|
|
pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d"
|
|
pvscsi_state(const char* state) "starting %s ..."
|
|
pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64
|
|
pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u"
|
|
|
|
# xen-hvm.c
|
|
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
|
|
xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
|
|
xen_ioreq_server_create(uint32_t id) "id: %u"
|
|
xen_ioreq_server_destroy(uint32_t id) "id: %u"
|
|
xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
|
|
xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
|
|
xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
|
|
handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
|
|
cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
|
|
cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
|
|
# xen-mapcache.c
|
|
xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
|
|
xen_remap_bucket(uint64_t index) "index %#"PRIx64
|
|
xen_map_cache_return(void* ptr) "%p"
|
|
|
|
# hw/i386/xen/xen_platform.c
|
|
xen_platform_log(char *s) "xen platform: %s"
|
|
|
|
# qemu-coroutine.c
|
|
qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
|
|
qemu_coroutine_yield(void *from, void *to) "from %p to %p"
|
|
qemu_coroutine_terminate(void *co) "self %p"
|
|
|
|
# qemu-coroutine-lock.c
|
|
qemu_co_queue_run_restart(void *co) "co %p"
|
|
qemu_co_queue_next(void *nxt) "next %p"
|
|
qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
|
|
|
|
# hw/char/escc.c
|
|
escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
|
|
escc_get_queue(char channel, int val) "channel %c get 0x%02x"
|
|
escc_update_irq(int irq) "IRQ = %d"
|
|
escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
|
|
escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
|
|
escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
|
|
escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
|
|
escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
|
|
escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
|
|
escc_sunkbd_event_in(int ch, const char *name, int down) "QKeyCode 0x%2.2x [%s], down %d"
|
|
escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x"
|
|
escc_kbd_command(int val) "Command %d"
|
|
escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
|
|
|
|
# hw/scsi/esp.c
|
|
esp_error_fifo_overrun(void) "FIFO overrun"
|
|
esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
|
|
esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
|
|
esp_raise_irq(void) "Raise IRQ"
|
|
esp_lower_irq(void) "Lower IRQ"
|
|
esp_dma_enable(void) "Raise enable"
|
|
esp_dma_disable(void) "Lower enable"
|
|
esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
|
|
esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
|
|
esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
|
|
esp_write_response(uint32_t status) "Transfer status (status=%d)"
|
|
esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
|
|
esp_command_complete(void) "SCSI Command complete"
|
|
esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
|
|
esp_command_complete_fail(void) "Command failed"
|
|
esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
|
|
esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
|
|
esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
|
|
esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
|
|
esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
|
|
esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
|
|
esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
|
|
esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
|
|
esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
|
|
esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
|
|
esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
|
|
esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
|
|
esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
|
|
esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
|
|
esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
|
|
|
|
# hw/scsi/esp-pci.c
|
|
esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
|
|
esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
|
|
esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
|
|
esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
|
|
esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
|
|
esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
|
|
esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
|
|
esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
|
|
esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
|
|
esp_pci_dma_start(uint32_t val) "START (%.8x)"
|
|
esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
|
|
esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
|
|
|
|
# monitor.c
|
|
handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
|
|
monitor_protocol_emitter(void *mon) "mon %p"
|
|
monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
|
|
monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
|
|
monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
|
|
monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
|
|
|
|
# hw/net/opencores_eth.c
|
|
open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
|
|
open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
|
|
open_eth_update_irq(uint32_t v) "IRQ <- %x"
|
|
open_eth_receive(unsigned len) "RX: len: %u"
|
|
open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
|
|
open_eth_receive_reject(void) "RX: rejected"
|
|
open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
|
|
open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
|
|
open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
|
|
open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
|
|
open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
|
|
open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
|
|
|
|
# hw/9pfs/virtio-9p.c
|
|
v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
|
|
v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
|
|
v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
|
|
v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
|
|
v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
|
|
v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
|
|
v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
|
|
v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
|
|
v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
|
|
v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
|
|
v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
|
|
v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
|
|
v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
|
|
v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
|
|
v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
|
|
v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
|
|
v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
|
|
v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
|
|
v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
|
|
v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
|
|
v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
|
|
v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
|
v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
|
|
v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
|
|
v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
|
|
v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
|
|
v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
|
v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
|
v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
|
|
v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
|
v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
|
|
v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
|
|
v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
|
|
v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
|
|
v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
|
|
v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
|
|
v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
|
|
|
|
# target-sparc/mmu_helper.c
|
|
mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
|
mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
|
mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
|
|
mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
|
|
mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
|
|
mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
|
|
|
|
# target-sparc/int64_helper.c
|
|
int_helper_set_softint(uint32_t softint) "new %08x"
|
|
int_helper_clear_softint(uint32_t softint) "new %08x"
|
|
int_helper_write_softint(uint32_t softint) "new %08x"
|
|
|
|
# target-sparc/int32_helper.c
|
|
int_helper_icache_freeze(void) "Instruction cache: freeze"
|
|
int_helper_dcache_freeze(void) "Data cache: freeze"
|
|
|
|
# target-sparc/win_helper.c
|
|
win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
|
|
win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
|
|
win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
|
|
win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
|
|
win_helper_done(uint32_t tl) "tl=%d"
|
|
win_helper_retry(uint32_t tl) "tl=%d"
|
|
|
|
# dma-helpers.c
|
|
dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d"
|
|
dma_aio_cancel(void *dbs) "dbs=%p"
|
|
dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
|
|
dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
|
|
dma_map_wait(void *dbs) "dbs=%p"
|
|
|
|
# ui/console.c
|
|
console_gfx_new(void) ""
|
|
console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
|
|
console_putchar_unhandled(int ch) "unhandled escape character '%c'"
|
|
console_txt_new(int w, int h) "%dx%d"
|
|
console_select(int nr) "%d"
|
|
console_refresh(int interval) "interval %d ms"
|
|
displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
|
|
displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
|
|
displaysurface_create_pixman(void *display_surface) "surface=%p"
|
|
displaysurface_free(void *display_surface) "surface=%p"
|
|
displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
|
|
displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
|
|
ppm_save(const char *filename, void *display_surface) "%s surface=%p"
|
|
|
|
# ui/gtk.c
|
|
gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
|
|
gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
|
|
gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
|
|
gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
|
|
gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
|
|
|
|
# ui/vnc.c
|
|
vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
|
|
vnc_key_map_init(const char *layout) "%s"
|
|
vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
|
|
vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
|
|
vnc_key_sync_numlock(bool on) "%d"
|
|
vnc_key_sync_capslock(bool on) "%d"
|
|
|
|
# ui/input.c
|
|
input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
|
|
input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
|
|
input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
|
|
input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
|
|
input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
|
|
input_event_sync(void) ""
|
|
input_mouse_mode(int absolute) "absolute %d"
|
|
|
|
# hw/display/vmware_vga.c
|
|
vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
|
|
|
|
# hw/display/virtio-gpu.c
|
|
virtio_gpu_features(bool virgl) "virgl %d"
|
|
virtio_gpu_cmd_get_display_info(void) ""
|
|
virtio_gpu_cmd_get_caps(void) ""
|
|
virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
|
|
virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
|
|
virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
|
|
virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
|
|
virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
|
|
virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
|
|
virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
|
|
virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
|
|
virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
|
|
virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
|
|
virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
|
|
virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
|
|
|
|
# migration/savevm.c
|
|
qemu_loadvm_state_section(unsigned int section_type) "%d"
|
|
qemu_loadvm_state_section_command(int ret) "%d"
|
|
qemu_loadvm_state_section_partend(uint32_t section_id) "%u"
|
|
qemu_loadvm_state_main(void) ""
|
|
qemu_loadvm_state_main_quit_parent(void) ""
|
|
qemu_loadvm_state_post_main(int ret) "%d"
|
|
qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr, uint32_t instance_id, uint32_t version_id) "%u(%s) %u %u"
|
|
qemu_savevm_send_packaged(void) ""
|
|
loadvm_handle_cmd_packaged(unsigned int length) "%u"
|
|
loadvm_handle_cmd_packaged_main(int ret) "%d"
|
|
loadvm_handle_cmd_packaged_received(int ret) "%d"
|
|
loadvm_postcopy_handle_advise(void) ""
|
|
loadvm_postcopy_handle_listen(void) ""
|
|
loadvm_postcopy_handle_run(void) ""
|
|
loadvm_postcopy_handle_run_cpu_sync(void) ""
|
|
loadvm_postcopy_handle_run_vmstart(void) ""
|
|
loadvm_postcopy_ram_handle_discard(void) ""
|
|
loadvm_postcopy_ram_handle_discard_end(void) ""
|
|
loadvm_postcopy_ram_handle_discard_header(const char *ramid, uint16_t len) "%s: %ud"
|
|
loadvm_process_command(uint16_t com, uint16_t len) "com=0x%x len=%d"
|
|
loadvm_process_command_ping(uint32_t val) "%x"
|
|
postcopy_ram_listen_thread_exit(void) ""
|
|
postcopy_ram_listen_thread_start(void) ""
|
|
qemu_savevm_send_postcopy_advise(void) ""
|
|
qemu_savevm_send_postcopy_ram_discard(const char *id, uint16_t len) "%s: %ud"
|
|
savevm_command_send(uint16_t command, uint16_t len) "com=0x%x len=%d"
|
|
savevm_section_start(const char *id, unsigned int section_id) "%s, section_id %u"
|
|
savevm_section_end(const char *id, unsigned int section_id, int ret) "%s, section_id %u -> %d"
|
|
savevm_section_skip(const char *id, unsigned int section_id) "%s, section_id %u"
|
|
savevm_send_open_return_path(void) ""
|
|
savevm_send_ping(uint32_t val) "%x"
|
|
savevm_send_postcopy_listen(void) ""
|
|
savevm_send_postcopy_run(void) ""
|
|
savevm_state_begin(void) ""
|
|
savevm_state_header(void) ""
|
|
savevm_state_iterate(void) ""
|
|
savevm_state_cleanup(void) ""
|
|
savevm_state_complete_precopy(void) ""
|
|
vmstate_save(const char *idstr, const char *vmsd_name) "%s, %s"
|
|
vmstate_load(const char *idstr, const char *vmsd_name) "%s, %s"
|
|
qemu_announce_self_iter(const char *mac) "%s"
|
|
|
|
# vmstate.c
|
|
vmstate_load_field_error(const char *field, int ret) "field \"%s\" load failed, ret = %d"
|
|
vmstate_load_state(const char *name, int version_id) "%s v%d"
|
|
vmstate_load_state_end(const char *name, const char *reason, int val) "%s %s/%d"
|
|
vmstate_load_state_field(const char *name, const char *field) "%s:%s"
|
|
vmstate_subsection_load(const char *parent) "%s"
|
|
vmstate_subsection_load_bad(const char *parent, const char *sub) "%s: %s"
|
|
vmstate_subsection_load_good(const char *parent) "%s"
|
|
|
|
# qemu-file.c
|
|
qemu_file_fclose(void) ""
|
|
|
|
# migration/ram.c
|
|
get_queued_page(const char *block_name, uint64_t tmp_offset, uint64_t ram_addr) "%s/%" PRIx64 " ram_addr=%" PRIx64
|
|
get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, uint64_t ram_addr, int sent) "%s/%" PRIx64 " ram_addr=%" PRIx64 " (sent=%d)"
|
|
migration_bitmap_sync_start(void) ""
|
|
migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64
|
|
migration_throttle(void) ""
|
|
ram_load_postcopy_loop(uint64_t addr, int flags) "@%" PRIx64 " %x"
|
|
ram_postcopy_send_discard_bitmap(void) ""
|
|
ram_save_queue_pages(const char *rbname, size_t start, size_t len) "%s: start: %zx len: %zx"
|
|
|
|
# hw/display/qxl.c
|
|
disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
|
|
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
|
|
qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
|
|
qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
|
|
qxl_destroy_primary(int qid) "%d"
|
|
qxl_enter_vga_mode(int qid) "%d"
|
|
qxl_exit_vga_mode(int qid) "%d"
|
|
qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
|
|
qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
|
|
qxl_interface_attach_worker(int qid) "%d"
|
|
qxl_interface_get_init_info(int qid) "%d"
|
|
qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
|
|
qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
|
|
qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
|
|
qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
|
|
qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
|
|
qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
|
|
qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
|
|
qxl_io_read_unexpected(int qid) "%d"
|
|
qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
|
|
qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
|
|
qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
|
|
qxl_post_load(int qid, const char *mode) "%d %s"
|
|
qxl_pre_load(int qid) "%d"
|
|
qxl_pre_save(int qid) "%d"
|
|
qxl_reset_surfaces(int qid) "%d"
|
|
qxl_ring_command_check(int qid, const char *mode) "%d %s"
|
|
qxl_ring_command_get(int qid, const char *mode) "%d %s"
|
|
qxl_ring_command_req_notification(int qid) "%d"
|
|
qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
|
|
qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
|
|
qxl_ring_cursor_req_notification(int qid) "%d"
|
|
qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
|
|
qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
|
|
qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
|
|
qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
|
|
qxl_soft_reset(int qid) "%d"
|
|
qxl_spice_destroy_surfaces_complete(int qid) "%d"
|
|
qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
|
|
qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
|
|
qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
|
|
qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
|
|
qxl_spice_monitors_config(int qid) "%d"
|
|
qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
|
|
qxl_spice_oom(int qid) "%d"
|
|
qxl_spice_reset_cursor(int qid) "%d"
|
|
qxl_spice_reset_image_cache(int qid) "%d"
|
|
qxl_spice_reset_memslots(int qid) "%d"
|
|
qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
|
|
qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
|
|
qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
|
|
qxl_send_events(int qid, uint32_t events) "%d %d"
|
|
qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
|
|
qxl_set_guest_bug(int qid) "%d"
|
|
qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
|
|
qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
|
|
qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
|
|
qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
|
|
qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
|
|
qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
|
|
|
|
# ui/spice-display.c
|
|
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
|
|
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
|
|
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
|
|
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
|
|
qemu_spice_wakeup(uint32_t qid) "%d"
|
|
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
|
|
|
|
# hw/display/qxl-render.c
|
|
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
|
|
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
|
|
qxl_render_update_area_done(void *cookie) "%p"
|
|
|
|
# hw/ppc/spapr_pci.c
|
|
spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
|
|
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
|
|
spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
|
|
spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
|
|
spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
|
|
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
|
|
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
|
|
|
|
# hw/pci/pci.c
|
|
pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
|
pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
|
|
|
# hw/net/pcnet.c
|
|
pcnet_s_reset(void *s) "s=%p"
|
|
pcnet_user_int(void *s) "s=%p"
|
|
pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d"
|
|
pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=%#"PRIx64
|
|
pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d"
|
|
pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]"
|
|
|
|
# hw/net/pcnet-pci.c
|
|
pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
|
|
pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
|
|
pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=%#"PRIx64" size=%d"
|
|
pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=%#"PRIx64" data=%#"PRIx64" size=%d"
|
|
pcnet_mmio_writeb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
pcnet_mmio_writew(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
pcnet_mmio_writel(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
pcnet_mmio_readb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
pcnet_mmio_readw(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
pcnet_mmio_readl(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
|
|
|
|
# hw/intc/xics.c
|
|
xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
|
|
xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
|
|
xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
|
|
xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x"
|
|
xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x"
|
|
xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]"
|
|
xics_masked_pending(void) "set_irq_msi: masked pending"
|
|
xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]"
|
|
xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
|
|
xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
|
|
xics_ics_eoi(int nr) "ics_eoi: irq %#x"
|
|
xics_alloc(int src, int irq) "source#%d, irq %d"
|
|
xics_alloc_block(int src, int first, int num, bool lsi, int align) "source#%d, first irq %d, %d irqs, lsi=%d, alignnum %d"
|
|
xics_ics_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs"
|
|
xics_ics_free_warn(int src, int irq) "Source#%d, irq %d is already free"
|
|
|
|
# hw/ppc/spapr.c
|
|
spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
|
|
spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
|
|
|
|
# hw/ppc/spapr_hcall.c
|
|
spapr_cas_pvr_try(uint32_t pvr) "%x"
|
|
spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
|
|
|
|
# hw/ppc/spapr_iommu.c
|
|
spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
|
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
|
spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
|
spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
|
spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
|
|
spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
|
|
spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
|
spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
|
|
|
# hw/ppc/ppc.c
|
|
ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
|
|
|
|
# hw/ppc/prep.c
|
|
prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
|
|
prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
|
|
|
|
# io/buffer.c
|
|
buffer_resize(const char *buf, size_t olen, size_t len) "%s: old %zd, new %zd"
|
|
buffer_move_empty(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s"
|
|
buffer_move(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s"
|
|
buffer_free(const char *buf, size_t len) "%s: capacity %zd"
|
|
|
|
# util/hbitmap.c
|
|
hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx"
|
|
hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
|
|
hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
|
|
|
|
# target-s390x/mmu_helper.c
|
|
get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
|
|
set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
|
|
|
|
# target-s390x/ioinst.c
|
|
ioinst(const char *insn) "IOINST: %s"
|
|
ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
|
|
ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
|
|
ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
|
|
|
|
# hw/s390x/css.c
|
|
css_enable_facility(const char *facility) "CSS: enable %s"
|
|
css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
|
|
css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
|
|
css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
|
|
css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
|
|
css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
|
|
css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
|
|
|
|
# hw/s390x/virtio-ccw.c
|
|
virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
|
|
virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
|
|
virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x"
|
|
|
|
# hw/intc/s390_flic_kvm.c
|
|
flic_create_device(int err) "flic: create device failed %d"
|
|
flic_no_device_api(int err) "flic: no Device Contral API support %d"
|
|
flic_reset_failed(int err) "flic: reset failed %d"
|
|
|
|
# migration.c
|
|
await_return_path_close_on_source_close(void) ""
|
|
await_return_path_close_on_source_joining(void) ""
|
|
migrate_set_state(int new_state) "new state %d"
|
|
migrate_fd_cleanup(void) ""
|
|
migrate_fd_error(const char *error_desc) "error=%s"
|
|
migrate_fd_cancel(void) ""
|
|
migrate_handle_rp_req_pages(const char *rbname, size_t start, size_t len) "in %s at %zx len %zx"
|
|
migrate_pending(uint64_t size, uint64_t max, uint64_t post, uint64_t nonpost) "pending size %" PRIu64 " max %" PRIu64 " (post=%" PRIu64 " nonpost=%" PRIu64 ")"
|
|
migrate_send_rp_message(int msg_type, uint16_t len) "%d: len %d"
|
|
migration_completion_file_err(void) ""
|
|
migration_completion_postcopy_end(void) ""
|
|
migration_completion_postcopy_end_after_complete(void) ""
|
|
migration_completion_postcopy_end_before_rp(void) ""
|
|
migration_completion_postcopy_end_after_rp(int rp_error) "%d"
|
|
migration_thread_after_loop(void) ""
|
|
migration_thread_file_err(void) ""
|
|
migration_thread_setup_complete(void) ""
|
|
open_return_path_on_source(void) ""
|
|
open_return_path_on_source_continue(void) ""
|
|
postcopy_start(void) ""
|
|
postcopy_start_set_run(void) ""
|
|
source_return_path_thread_bad_end(void) ""
|
|
source_return_path_thread_end(void) ""
|
|
source_return_path_thread_entry(void) ""
|
|
source_return_path_thread_loop_top(void) ""
|
|
source_return_path_thread_pong(uint32_t val) "%x"
|
|
source_return_path_thread_shut(uint32_t val) "%x"
|
|
migrate_global_state_post_load(const char *state) "loaded state: %s"
|
|
migrate_global_state_pre_save(const char *state) "saved state: %s"
|
|
migration_thread_low_pending(uint64_t pending) "%" PRIu64
|
|
migrate_state_too_big(void) ""
|
|
migrate_transferred(uint64_t tranferred, uint64_t time_spent, double bandwidth, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %g max_size %" PRId64
|
|
process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d"
|
|
process_incoming_migration_co_postcopy_end_main(void) ""
|
|
migration_set_incoming_channel(void *ioc, const char *ioctype) "ioc=%p ioctype=%s"
|
|
migration_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname) "ioc=%p ioctype=%s hostname=%s"
|
|
|
|
# migration/rdma.c
|
|
qemu_rdma_accept_incoming_migration(void) ""
|
|
qemu_rdma_accept_incoming_migration_accepted(void) ""
|
|
qemu_rdma_accept_pin_state(bool pin) "%d"
|
|
qemu_rdma_accept_pin_verbsc(void *verbs) "Verbs context after listen: %p"
|
|
qemu_rdma_block_for_wrid_miss(const char *wcompstr, int wcomp, const char *gcompstr, uint64_t req) "A Wanted wrid %s (%d) but got %s (%" PRIu64 ")"
|
|
qemu_rdma_block_for_wrid_miss_b(const char *wcompstr, int wcomp, const char *gcompstr, uint64_t req) "B Wanted wrid %s (%d) but got %s (%" PRIu64 ")"
|
|
qemu_rdma_cleanup_disconnect(void) ""
|
|
qemu_rdma_cleanup_waiting_for_disconnect(void) ""
|
|
qemu_rdma_close(void) ""
|
|
qemu_rdma_connect_pin_all_requested(void) ""
|
|
qemu_rdma_connect_pin_all_outcome(bool pin) "%d"
|
|
qemu_rdma_dest_init_trying(const char *host, const char *ip) "%s => %s"
|
|
qemu_rdma_dump_gid(const char *who, const char *src, const char *dst) "%s Source GID: %s, Dest GID: %s"
|
|
qemu_rdma_exchange_get_response_start(const char *desc) "CONTROL: %s receiving..."
|
|
qemu_rdma_exchange_get_response_none(const char *desc, int type) "Surprise: got %s (%d)"
|
|
qemu_rdma_exchange_send_issue_callback(void) ""
|
|
qemu_rdma_exchange_send_waiting(const char *desc) "Waiting for response %s"
|
|
qemu_rdma_exchange_send_received(const char *desc) "Response %s received."
|
|
qemu_rdma_fill(size_t control_len, size_t size) "RDMA %zd of %zd bytes already in buffer"
|
|
qemu_rdma_init_ram_blocks(int blocks) "Allocated %d local ram block structures"
|
|
qemu_rdma_poll_recv(const char *compstr, int64_t comp, int64_t id, int sent) "completion %s #%" PRId64 " received (%" PRId64 ") left %d"
|
|
qemu_rdma_poll_write(const char *compstr, int64_t comp, int left, uint64_t block, uint64_t chunk, void *local, void *remote) "completions %s (%" PRId64 ") left %d, block %" PRIu64 ", chunk: %" PRIu64 " %p %p"
|
|
qemu_rdma_poll_other(const char *compstr, int64_t comp, int left) "other completion %s (%" PRId64 ") received left %d"
|
|
qemu_rdma_post_send_control(const char *desc) "CONTROL: sending %s.."
|
|
qemu_rdma_register_and_get_keys(uint64_t len, void *start) "Registering %" PRIu64 " bytes @ %p"
|
|
qemu_rdma_registration_handle_compress(int64_t length, int index, int64_t offset) "Zapping zero chunk: %" PRId64 " bytes, index %d, offset %" PRId64
|
|
qemu_rdma_registration_handle_finished(void) ""
|
|
qemu_rdma_registration_handle_ram_blocks(void) ""
|
|
qemu_rdma_registration_handle_ram_blocks_loop(const char *name, uint64_t offset, uint64_t length, void *local_host_addr, unsigned int src_index) "%s: @%" PRIx64 "/%" PRIu64 " host:@%p src_index: %u"
|
|
qemu_rdma_registration_handle_register(int requests) "%d requests"
|
|
qemu_rdma_registration_handle_register_loop(int req, int index, uint64_t addr, uint64_t chunks) "Registration request (%d): index %d, current_addr %" PRIu64 " chunks: %" PRIu64
|
|
qemu_rdma_registration_handle_register_rkey(int rkey) "%x"
|
|
qemu_rdma_registration_handle_unregister(int requests) "%d requests"
|
|
qemu_rdma_registration_handle_unregister_loop(int count, int index, uint64_t chunk) "Unregistration request (%d): index %d, chunk %" PRIu64
|
|
qemu_rdma_registration_handle_unregister_success(uint64_t chunk) "%" PRIu64
|
|
qemu_rdma_registration_handle_wait(void) ""
|
|
qemu_rdma_registration_start(uint64_t flags) "%" PRIu64
|
|
qemu_rdma_registration_stop(uint64_t flags) "%" PRIu64
|
|
qemu_rdma_registration_stop_ram(void) ""
|
|
qemu_rdma_resolve_host_trying(const char *host, const char *ip) "Trying %s => %s"
|
|
qemu_rdma_signal_unregister_append(uint64_t chunk, int pos) "Appending unregister chunk %" PRIu64 " at position %d"
|
|
qemu_rdma_signal_unregister_already(uint64_t chunk) "Unregister chunk %" PRIu64 " already in queue"
|
|
qemu_rdma_unregister_waiting_inflight(uint64_t chunk) "Cannot unregister inflight chunk: %" PRIu64
|
|
qemu_rdma_unregister_waiting_proc(uint64_t chunk, int pos) "Processing unregister for chunk: %" PRIu64 " at position %d"
|
|
qemu_rdma_unregister_waiting_send(uint64_t chunk) "Sending unregister for chunk: %" PRIu64
|
|
qemu_rdma_unregister_waiting_complete(uint64_t chunk) "Unregister for chunk: %" PRIu64 " complete."
|
|
qemu_rdma_write_flush(int sent) "sent total: %d"
|
|
qemu_rdma_write_one_block(int count, int block, uint64_t chunk, uint64_t current, uint64_t len, int nb_sent, int nb_chunks) "(%d) Not clobbering: block: %d chunk %" PRIu64 " current %" PRIu64 " len %" PRIu64 " %d %d"
|
|
qemu_rdma_write_one_post(uint64_t chunk, long addr, long remote, uint32_t len) "Posting chunk: %" PRIu64 ", addr: %lx remote: %lx, bytes %" PRIu32
|
|
qemu_rdma_write_one_queue_full(void) ""
|
|
qemu_rdma_write_one_recvregres(int mykey, int theirkey, uint64_t chunk) "Received registration result: my key: %x their key %x, chunk %" PRIu64
|
|
qemu_rdma_write_one_sendreg(uint64_t chunk, int len, int index, int64_t offset) "Sending registration request chunk %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64
|
|
qemu_rdma_write_one_top(uint64_t chunks, uint64_t size) "Writing %" PRIu64 " chunks, (%" PRIu64 " MB)"
|
|
qemu_rdma_write_one_zero(uint64_t chunk, int len, int index, int64_t offset) "Entire chunk is zero, sending compress: %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64
|
|
rdma_add_block(const char *block_name, int block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Added Block: '%s':%d, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d"
|
|
rdma_block_notification_handle(const char *name, int index) "%s at %d"
|
|
rdma_delete_block(void *block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Deleted Block: %p, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d"
|
|
rdma_start_incoming_migration(void) ""
|
|
rdma_start_incoming_migration_after_dest_init(void) ""
|
|
rdma_start_incoming_migration_after_rdma_listen(void) ""
|
|
rdma_start_outgoing_migration_after_rdma_connect(void) ""
|
|
rdma_start_outgoing_migration_after_rdma_source_init(void) ""
|
|
|
|
# migration/postcopy-ram.c
|
|
postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) "%s mask words sent=%d in %d commands"
|
|
postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) "%s:%lx/%lx"
|
|
postcopy_ram_discard_range(void *start, size_t length) "%p,+%zx"
|
|
postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
|
|
postcopy_init_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
|
|
postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
|
|
postcopy_place_page(void *host_addr) "host=%p"
|
|
postcopy_place_page_zero(void *host_addr) "host=%p"
|
|
postcopy_ram_enable_notify(void) ""
|
|
postcopy_ram_fault_thread_entry(void) ""
|
|
postcopy_ram_fault_thread_exit(void) ""
|
|
postcopy_ram_fault_thread_quit(void) ""
|
|
postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock, size_t offset) "Request for HVA=%" PRIx64 " rb=%s offset=%zx"
|
|
postcopy_ram_incoming_cleanup_closeuf(void) ""
|
|
postcopy_ram_incoming_cleanup_entry(void) ""
|
|
postcopy_ram_incoming_cleanup_exit(void) ""
|
|
postcopy_ram_incoming_cleanup_join(void) ""
|
|
|
|
# migration/exec.c
|
|
migration_exec_outgoing(const char *cmd) "cmd=%s"
|
|
migration_exec_incoming(const char *cmd) "cmd=%s"
|
|
|
|
# migration/fd.c
|
|
migration_fd_outgoing(int fd) "fd=%d"
|
|
migration_fd_incoming(int fd) "fd=%d"
|
|
|
|
# migration/socket.c
|
|
migration_socket_incoming_accepted(void) ""
|
|
migration_socket_outgoing_connected(const char *hostname) "hostname=%s"
|
|
migration_socket_outgoing_error(const char *err) "error=%s"
|
|
|
|
# migration/tls.c
|
|
migration_tls_outgoing_handshake_start(const char *hostname) "hostname=%s"
|
|
migration_tls_outgoing_handshake_error(const char *err) "err=%s"
|
|
migration_tls_outgoing_handshake_complete(void) ""
|
|
migration_tls_incoming_handshake_start(void) ""
|
|
migration_tls_incoming_handshake_error(const char *err) "err=%s"
|
|
migration_tls_incoming_handshake_complete(void) ""
|
|
|
|
# kvm-all.c
|
|
kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
|
|
kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
|
|
kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
|
|
kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
|
|
kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
|
|
|
|
# target-ppc/kvm.c
|
|
kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
|
|
kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
|
|
|
|
# TCG related tracing (mostly disabled by default)
|
|
# cpu-exec.c
|
|
disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
|
disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
|
disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
|
|
|
|
# translate-all.c
|
|
translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
|
|
|
|
# memory.c
|
|
memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
# qom/object.c
|
|
object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
|
object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
|
|
|
# hw/i386/xen/xen_pvdevice.c
|
|
xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
|
|
xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
|
|
|
|
# hw/pci/pci_host.c
|
|
pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
|
|
pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
|
|
|
|
# hw/vfio/pci.c
|
|
vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
|
|
vfio_intx_eoi(const char *name) " (%s) EOI"
|
|
vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
|
|
vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
|
|
vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
|
|
vfio_intx_enable(const char *name) " (%s)"
|
|
vfio_intx_disable(const char *name) " (%s)"
|
|
vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
|
|
vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
|
|
vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
|
|
vfio_msix_enable(const char *name) " (%s)"
|
|
vfio_msix_pba_disable(const char *name) " (%s)"
|
|
vfio_msix_pba_enable(const char *name) " (%s)"
|
|
vfio_msix_disable(const char *name) " (%s)"
|
|
vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
|
|
vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
|
|
vfio_msi_disable(const char *name) " (%s)"
|
|
vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
|
|
vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
|
|
vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
|
|
vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
|
|
vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
|
|
vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
|
|
vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
|
|
vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
|
|
vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
|
|
vfio_check_pm_reset(const char *name) "%s Supports PM reset"
|
|
vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
|
|
vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
|
|
vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
|
|
vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
|
|
vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
|
|
vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
|
|
vfio_initfn(const char *name, int group_id) " (%s) group %d"
|
|
vfio_pci_reset(const char *name) " (%s)"
|
|
vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
|
|
vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
|
|
vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
|
|
|
|
# hw/vfio/pci-quirks.
|
|
vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
|
|
vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
|
vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
|
vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
|
|
vfio_quirk_ati_3c3_probe(const char *name) "%s"
|
|
vfio_quirk_ati_bar4_probe(const char *name) "%s"
|
|
vfio_quirk_ati_bar2_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
|
|
vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
|
|
vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
|
|
vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
|
|
vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
|
|
vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
|
|
vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
|
|
vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
|
|
vfio_quirk_rtl8168_probe(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset(const char *name) "%s"
|
|
vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x"
|
|
vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB"
|
|
vfio_pci_igd_opregion_enabled(const char *name) "%s"
|
|
vfio_pci_igd_host_bridge_enabled(const char *name) "%s"
|
|
vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s"
|
|
|
|
# hw/vfio/common.c
|
|
vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
|
|
vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
|
|
vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
|
|
vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
|
|
vfio_disconnect_container(int fd) "close container->fd=%d"
|
|
vfio_put_group(int fd) "close group->fd=%d"
|
|
vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
|
|
vfio_put_base_device(int fd) "close vdev->fd=%d"
|
|
vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
|
|
vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
|
|
vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
|
|
vfio_region_exit(const char *name, int index) "Device %s, region %d"
|
|
vfio_region_finalize(const char *name, int index) "Device %s, region %d"
|
|
vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
|
|
vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries"
|
|
vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
|
|
vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8"
|
|
|
|
# hw/vfio/platform.c
|
|
vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
|
|
vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
|
|
vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
|
|
vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
|
|
vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
|
|
vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
|
|
vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
|
|
vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
|
|
vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
|
|
vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
|
|
|
|
|
|
#hw/acpi/memory_hotplug.c
|
|
mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
|
|
mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
|
|
mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
|
|
mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
|
|
mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
|
|
mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
|
|
mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
|
|
mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
|
|
mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
|
|
mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
|
|
mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
|
|
mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
|
|
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
|
|
|
|
# hw/i386/pc.c
|
|
mhp_pc_dimm_assigned_slot(int slot) "0x%d"
|
|
mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
|
|
|
|
# target-s390x/kvm.c
|
|
kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
|
|
kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
|
|
kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
|
|
kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
|
|
|
|
# hw/dma/i8257.c
|
|
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
|
|
|
|
# target-s390x/cpu.c
|
|
cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
|
|
cpu_halt(int cpu_index) "halting cpu %d"
|
|
cpu_unhalt(int cpu_index) "unhalting cpu %d"
|
|
|
|
# hw/arm/virt-acpi-build.c
|
|
virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
|
|
|
|
# hw/alpha/pci.c
|
|
alpha_pci_iack_write(void) ""
|
|
|
|
# audio/alsaaudio.c
|
|
alsa_revents(int revents) "revents = %d"
|
|
alsa_pollout(int i, int fd) "i = %d fd = %d"
|
|
alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
|
|
alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
|
|
alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
|
|
alsa_xrun_out(void) "Recovering from playback xrun"
|
|
alsa_xrun_in(void) "Recovering from capture xrun"
|
|
alsa_resume_out(void) "Resuming suspended output stream"
|
|
alsa_resume_in(void) "Resuming suspended input stream"
|
|
alsa_no_frames(int state) "No frames available and ALSA state is %d"
|
|
|
|
# audio/ossaudio.c
|
|
oss_version(int version) "OSS version = %#x"
|
|
oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
|
|
|
|
# crypto/tlscreds.c
|
|
qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%s"
|
|
qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) "TLS creds path creds=%p filename=%s path=%s"
|
|
|
|
# crypto/tlscredsanon.c
|
|
qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s"
|
|
|
|
# crypto/tlscredsx509.c
|
|
qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s"
|
|
qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) "TLS creds x509 check basic constraints creds=%p file=%s status=%d"
|
|
qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d"
|
|
qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int status, const char *usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%s critical=%d"
|
|
qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load cert creds=%p isServer=%d file=%s"
|
|
qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list creds=%p file=%s"
|
|
|
|
# crypto/tlssession.c
|
|
qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *aclname, int endpoint) "TLS session new session=%p creds=%p hostname=%s aclname=%s endpoint=%d"
|
|
|
|
# net/vhost-user.c
|
|
vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
|
|
|
|
# linux-user/signal.c
|
|
user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
|
|
user_handle_signal(void *env, int target_sig) "env=%p signal %d"
|
|
user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
|
|
user_queue_signal(void *env, int target_sig) "env=%p signal %d"
|
|
user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
|
|
|
|
# io/task.c
|
|
qio_task_new(void *task, void *source, void *func, void *opaque) "Task new task=%p source=%p func=%p opaque=%p"
|
|
qio_task_complete(void *task) "Task complete task=%p"
|
|
qio_task_abort(void *task) "Task abort task=%p"
|
|
qio_task_thread_start(void *task, void *worker, void *opaque) "Task thread start task=%p worker=%p opaque=%p"
|
|
qio_task_thread_run(void *task) "Task thread run task=%p"
|
|
qio_task_thread_exit(void *task) "Task thread exit task=%p"
|
|
qio_task_thread_result(void *task) "Task thread result task=%p"
|
|
|
|
# io/channel-socket.c
|
|
qio_channel_socket_new(void *ioc) "Socket new ioc=%p"
|
|
qio_channel_socket_new_fd(void *ioc, int fd) "Socket new ioc=%p fd=%d"
|
|
qio_channel_socket_connect_sync(void *ioc, void *addr) "Socket connect sync ioc=%p addr=%p"
|
|
qio_channel_socket_connect_async(void *ioc, void *addr) "Socket connect async ioc=%p addr=%p"
|
|
qio_channel_socket_connect_fail(void *ioc) "Socket connect fail ioc=%p"
|
|
qio_channel_socket_connect_complete(void *ioc, int fd) "Socket connect complete ioc=%p fd=%d"
|
|
qio_channel_socket_listen_sync(void *ioc, void *addr) "Socket listen sync ioc=%p addr=%p"
|
|
qio_channel_socket_listen_async(void *ioc, void *addr) "Socket listen async ioc=%p addr=%p"
|
|
qio_channel_socket_listen_fail(void *ioc) "Socket listen fail ioc=%p"
|
|
qio_channel_socket_listen_complete(void *ioc, int fd) "Socket listen complete ioc=%p fd=%d"
|
|
qio_channel_socket_dgram_sync(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram sync ioc=%p localAddr=%p remoteAddr=%p"
|
|
qio_channel_socket_dgram_async(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram async ioc=%p localAddr=%p remoteAddr=%p"
|
|
qio_channel_socket_dgram_fail(void *ioc) "Socket dgram fail ioc=%p"
|
|
qio_channel_socket_dgram_complete(void *ioc, int fd) "Socket dgram complete ioc=%p fd=%d"
|
|
qio_channel_socket_accept(void *ioc) "Socket accept start ioc=%p"
|
|
qio_channel_socket_accept_fail(void *ioc) "Socket accept fail ioc=%p"
|
|
qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) "Socket accept complete ioc=%p cioc=%p fd=%d"
|
|
|
|
# io/channel-file.c
|
|
qio_channel_file_new_fd(void *ioc, int fd) "File new fd ioc=%p fd=%d"
|
|
qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) "File new fd ioc=%p path=%s flags=%d mode=%d fd=%d"
|
|
|
|
# io/channel-tls.c
|
|
qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) "TLS new client ioc=%p master=%p creds=%p hostname=%s"
|
|
qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) "TLS new client ioc=%p master=%p creds=%p acltname=%s"
|
|
qio_channel_tls_handshake_start(void *ioc) "TLS handshake start ioc=%p"
|
|
qio_channel_tls_handshake_pending(void *ioc, int status) "TLS handshake pending ioc=%p status=%d"
|
|
qio_channel_tls_handshake_fail(void *ioc) "TLS handshake fail ioc=%p"
|
|
qio_channel_tls_handshake_complete(void *ioc) "TLS handshake complete ioc=%p"
|
|
qio_channel_tls_credentials_allow(void *ioc) "TLS credentials allow ioc=%p"
|
|
qio_channel_tls_credentials_deny(void *ioc) "TLS credentials deny ioc=%p"
|
|
|
|
# io/channel-websock.c
|
|
qio_channel_websock_new_server(void *ioc, void *master) "Websock new client ioc=%p master=%p"
|
|
qio_channel_websock_handshake_start(void *ioc) "Websock handshake start ioc=%p"
|
|
qio_channel_websock_handshake_pending(void *ioc, int status) "Websock handshake pending ioc=%p status=%d"
|
|
qio_channel_websock_handshake_reply(void *ioc) "Websock handshake reply ioc=%p"
|
|
qio_channel_websock_handshake_fail(void *ioc) "Websock handshake fail ioc=%p"
|
|
qio_channel_websock_handshake_complete(void *ioc) "Websock handshake complete ioc=%p"
|
|
|
|
# io/channel-command.c
|
|
qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) "Command new pid ioc=%p writefd=%d readfd=%d pid=%d"
|
|
qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) "Command new spawn ioc=%p binary=%s flags=%d"
|
|
qio_channel_command_abort(void *ioc, int pid) "Command abort ioc=%p pid=%d"
|
|
qio_channel_command_wait(void *ioc, int pid, int ret, int status) "Command abort ioc=%p pid=%d ret=%d status=%d"
|
|
|
|
# hw/timer/aspeed_timer.c
|
|
aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
|
|
aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
|
|
aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
|
|
|
|
# hw/intc/aspeed_vic.c
|
|
aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d"
|
|
aspeed_vic_update_fiq(int flags) "Raising FIQ: %d"
|
|
aspeed_vic_update_irq(int flags) "Raising IRQ: %d"
|
|
aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32
|
|
aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
|
|
|
|
# hw/intc/arm_gic.c
|
|
gic_enable_irq(int irq) "irq %d enabled"
|
|
gic_disable_irq(int irq) "irq %d disabled"
|
|
gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x"
|
|
gic_update_bestirq(int cpu, int irq, int prio, int priority_mask, int running_priority) "cpu %d irq %d priority %d cpu priority mask %d cpu running priority %d"
|
|
gic_update_set_irq(int cpu, const char *name, int level) "cpu[%d]: %s = %d"
|
|
gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d"
|
|
|
|
# hw/net/net_rx_pkt.c
|
|
net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu"
|
|
net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation"
|
|
net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet"
|
|
net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) "UDP packet without checksum"
|
|
net_rx_pkt_l4_csum_validate_ip4_fragment(void) "IP4 fragment"
|
|
net_rx_pkt_l4_csum_validate_ip4_udp(void) "IP4/UDP packet"
|
|
net_rx_pkt_l4_csum_validate_ip4_tcp(void) "IP4/TCP packet"
|
|
net_rx_pkt_l4_csum_validate_ip6_udp(void) "IP6/UDP packet"
|
|
net_rx_pkt_l4_csum_validate_ip6_tcp(void) "IP6/TCP packet"
|
|
net_rx_pkt_l4_csum_validate_csum(bool csum_valid) "Checksum valid: %d"
|
|
|
|
net_rx_pkt_l4_csum_calc_entry(void) "Starting L4 checksum calculation"
|
|
net_rx_pkt_l4_csum_calc_ip4_udp(void) "IP4/UDP packet"
|
|
net_rx_pkt_l4_csum_calc_ip4_tcp(void) "IP4/TCP packet"
|
|
net_rx_pkt_l4_csum_calc_ip6_udp(void) "IP6/UDP packet"
|
|
net_rx_pkt_l4_csum_calc_ip6_tcp(void) "IP6/TCP packet"
|
|
net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) "Pseudo-header: checksum counter %u, length %u"
|
|
net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X"
|
|
|
|
net_rx_pkt_l4_csum_fix_entry(void) "Starting L4 checksum correction"
|
|
net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) "TCP packet, L4 cso: %u"
|
|
net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) "UDP packet, L4 cso: %u"
|
|
net_rx_pkt_l4_csum_fix_not_xxp(void) "Not an IP4 packet"
|
|
net_rx_pkt_l4_csum_fix_ip4_fragment(void) "IP4 fragment"
|
|
net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) "UDP packet without checksum"
|
|
net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) "L4 Checksum: Offset: %u, value 0x%X"
|
|
|
|
net_rx_pkt_l3_csum_validate_entry(void) "Starting L3 checksum validation"
|
|
net_rx_pkt_l3_csum_validate_not_ip4(void) "Not an IP4 packet"
|
|
net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d"
|
|
|
|
net_rx_pkt_rss_ip4(void) "Calculating IPv4 RSS hash"
|
|
net_rx_pkt_rss_ip4_tcp(void) "Calculating IPv4/TCP RSS hash"
|
|
net_rx_pkt_rss_ip6_tcp(void) "Calculating IPv6/TCP RSS hash"
|
|
net_rx_pkt_rss_ip6(void) "Calculating IPv6 RSS hash"
|
|
net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash"
|
|
net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X"
|
|
net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes"
|
|
|
|
# hw/net/e1000x_common.c
|
|
e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d"
|
|
e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X"
|
|
e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x"
|
|
e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x"
|
|
e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] %x"
|
|
e1000x_rx_link_down(uint32_t status_reg) "Received packet dropped because the link is down STATUS = %u"
|
|
e1000x_rx_disabled(uint32_t rctl_reg) "Received packet dropped because receive is disabled RCTL = %u"
|
|
e1000x_rx_oversized(size_t size) "Received packet dropped because it was oversized (%zu bytes)"
|
|
e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x"
|
|
e1000x_link_negotiation_start(void) "Start link auto negotiation"
|
|
e1000x_link_negotiation_done(void) "Auto negotiation is completed"
|
|
|
|
# hw/net/e1000e_core.c
|
|
e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
|
|
e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
|
|
e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC READ: PHY[%u][%u] = 0x%x"
|
|
e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) "MDIC READ: PHY[%u][%u] UNHANDLED"
|
|
e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u][%u] = 0x%x"
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e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) "MDIC WRITE: PHY[%u][%u] UNHANDLED"
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e1000e_core_eeeprom_write(uint16_t bit_in, uint16_t bit_out, uint16_t reading) "eeprom bitnum in %d out %d, reading %d"
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e1000e_core_ctrl_write(uint64_t index, uint32_t val) "Write CTRL register 0x%"PRIx64", value: 0x%X"
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e1000e_core_ctrl_sw_reset(void) "Doing SW reset"
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e1000e_core_ctrl_phy_reset(void) "Doing PHY reset"
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e1000e_link_autoneg_flowctl(bool enabled) "Auto-negotiated flow control state is %d"
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e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d"
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e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d"
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e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) "Set extended link params: ASD check: %d, Speed select bypass: %d"
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e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d"
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e1000e_link_status_changed(bool status) "New link status: %d"
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e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
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e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
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e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) "WARNING: Read from unknown register 0x%"PRIx64", %d byte(s)"
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e1000e_wrn_regs_read_trivial(uint32_t index) "WARNING: Reading register at offset: 0x%05x. It is not fully implemented."
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e1000e_wrn_regs_write_trivial(uint32_t index) "WARNING: Writing to register at offset: 0x%05x. It is not fully implemented."
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e1000e_wrn_no_ts_support(void) "WARNING: Guest requested TX timestamping which is not supported"
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e1000e_wrn_no_snap_support(void) "WARNING: Guest requested TX SNAP header update which is not supported"
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e1000e_wrn_iscsi_filtering_not_supported(void) "WARNING: Guest requested iSCSI filtering which is not supported"
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e1000e_wrn_nfsw_filtering_not_supported(void) "WARNING: Guest requested NFS write filtering which is not supported"
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e1000e_wrn_nfsr_filtering_not_supported(void) "WARNING: Guest requested NFS read filtering which is not supported"
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e1000e_tx_disabled(void) "TX Disabled"
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e1000e_tx_descr(void *addr, uint32_t lower, uint32_t upper) "%p : %x %x"
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e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) "ring #%d: LEN: %u, DH: %u, DT: %u"
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e1000e_rx_can_recv_rings_full(void) "Cannot receive: all rings are full"
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e1000e_rx_can_recv(void) "Can receive"
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e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) "ring #%d: free descr: %u, packet size %zu, descr buffer size %u"
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e1000e_rx_null_descriptor(void) "Null RX descriptor!!"
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e1000e_rx_flt_vlan_mismatch(uint16_t vid) "VID mismatch: 0x%X"
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e1000e_rx_flt_vlan_match(uint16_t vid) "VID match: 0x%X"
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e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) "buffers: [0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64"]"
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e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) "bytes written: [%u, %u, %u, %u]"
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e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) "buffer sizes: [%u, %u, %u, %u]"
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e1000e_rx_desc_len(uint8_t rx_desc_len) "RX descriptor length: %u"
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e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) "buffer #%u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u"
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e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) "Next RX descriptor: ring #%d, PA: 0x%"PRIx64", length: %u"
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e1000e_rx_set_rctl(uint32_t rctl) "RCTL = 0x%x"
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e1000e_rx_receive_iov(int iovcnt) "Received vector of %d fragments"
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e1000e_rx_packet_size(size_t full, size_t vhdr, size_t data) "Received packet of %zu bytes total, %zu virt header, %zu data"
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e1000e_rx_flt_dropped(void) "Received packet dropped by RX filter"
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e1000e_rx_written_to_guest(uint32_t causes) "Received packet written to guest (ICR causes %u)"
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e1000e_rx_not_written_to_guest(uint32_t causes) "Received packet NOT written to guest (ICR causes %u)"
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e1000e_rx_interrupt_set(uint32_t causes) "Receive interrupt set (ICR causes %u)"
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e1000e_rx_interrupt_delayed(uint32_t causes) "Receive interrupt delayed (ICR causes %u)"
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e1000e_rx_set_cso(int cso_state) "RX CSO state set to %d"
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e1000e_rx_set_rdt(int queue_idx, uint32_t val) "Setting RDT[%d] = %u"
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e1000e_rx_set_rfctl(uint32_t val) "Setting RFCTL = 0x%X"
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e1000e_rx_start_recv(void)
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e1000e_rx_rss_started(void) "Starting RSS processing"
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e1000e_rx_rss_disabled(void) "RSS is disabled"
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e1000e_rx_rss_type(uint32_t type) "RSS type is %u"
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e1000e_rx_rss_ip4(bool isfragment, bool istcp, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) "RSS IPv4: fragment %d, tcp %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d"
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e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) "RSS IPv6: rfctl 0x%X"
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e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, bool istcp, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6_enabled, bool ipv6ex_enabled, bool ipv6_enabled) "RSS IPv6: ex_dis: %d, new_ex_dis: %d, tcp %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6 enabled %d, ipv6ex enabled %d, ipv6 enabled %d"
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e1000e_rx_rss_dispatched_to_queue(int queue_idx) "Packet being dispatched to queue %d"
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e1000e_rx_metadata_protocols(bool isip4, bool isip6, bool isudp, bool istcp) "protocols: ip4: %d, ip6: %d, udp: %d, tcp: %d"
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e1000e_rx_metadata_vlan(uint16_t vlan_tag) "VLAN tag is 0x%X"
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e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) "RSS data: rss: 0x%X, mrq: 0x%X"
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e1000e_rx_metadata_ip_id(uint16_t ip_id) "the IPv4 ID is 0x%X"
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e1000e_rx_metadata_ack(void) "the packet is TCP ACK"
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e1000e_rx_metadata_pkt_type(uint32_t pkt_type) "the packet type is %u"
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e1000e_rx_metadata_no_virthdr(void) "the packet has no virt-header"
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e1000e_rx_metadata_virthdr_no_csum_info(void) "virt-header does not contain checksum info"
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e1000e_rx_metadata_l3_cso_disabled(void) "IP4 CSO is disabled"
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e1000e_rx_metadata_l4_cso_disabled(void) "TCP/UDP CSO is disabled"
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e1000e_rx_metadata_l3_csum_validation_failed(void) "Cannot validate L3 checksum"
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e1000e_rx_metadata_l4_csum_validation_failed(void) "Cannot validate L4 checksum"
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e1000e_rx_metadata_status_flags(uint32_t status_flags) "status_flags is 0x%X"
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e1000e_rx_metadata_ipv6_sum_disabled(void) "IPv6 RX checksummimg disabled by RFCTL"
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e1000e_rx_metadata_ipv6_filtering_disabled(void) "IPv6 RX filtering disabled by RFCTL"
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e1000e_vlan_vet(uint16_t vet) "Setting VLAN ethernet type 0x%X"
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e1000e_irq_set_cause(uint32_t cause) "IRQ cause set 0x%x"
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e1000e_irq_msi_notify(uint32_t cause) "MSI notify 0x%x"
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e1000e_irq_throttling_no_pending_interrupts(void) "No pending interrupts to notify"
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e1000e_irq_msi_notify_postponed(void) "Sending MSI postponed by ITR"
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e1000e_irq_legacy_notify_postponed(void) "Raising legacy IRQ postponed by ITR"
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e1000e_irq_throttling_no_pending_vec(int idx) "No pending interrupts for vector %d"
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e1000e_irq_msix_notify_postponed_vec(int idx) "Sending MSI-X postponed by EITR[%d]"
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e1000e_irq_msix_notify(uint32_t cause) "MSI-X notify 0x%x"
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e1000e_irq_legacy_notify(bool level) "IRQ line state: %d"
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e1000e_irq_msix_notify_vec(uint32_t vector) "MSI-X notify vector 0x%x"
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e1000e_irq_postponed_by_xitr(uint32_t reg) "Interrupt postponed by [E]ITR register 0x%x"
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e1000e_irq_clear_ims(uint32_t bits, uint32_t old_ims, uint32_t new_ims) "Clearing IMS bits 0x%x: 0x%x --> 0x%x"
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e1000e_irq_set_ims(uint32_t bits, uint32_t old_ims, uint32_t new_ims) "Setting IMS bits 0x%x: 0x%x --> 0x%x"
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e1000e_irq_fix_icr_asserted(uint32_t new_val) "ICR_ASSERTED bit fixed: 0x%x"
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e1000e_irq_add_msi_other(uint32_t new_val) "ICR_OTHER bit added: 0x%x"
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e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) "ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)"
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e1000e_irq_set_cause_entry(uint32_t val, uint32_t icr) "Going to set IRQ cause 0x%x, ICR: 0x%x"
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e1000e_irq_set_cause_exit(uint32_t val, uint32_t icr) "Set IRQ cause 0x%x, ICR: 0x%x"
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e1000e_irq_icr_write(uint32_t bits, uint32_t old_icr, uint32_t new_icr) "Clearing ICR bits 0x%x: 0x%x --> 0x%x"
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e1000e_irq_write_ics(uint32_t val) "Adding ICR bits 0x%x"
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e1000e_irq_icr_process_iame(void) "Clearing IMS bits due to IAME"
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e1000e_irq_read_ics(uint32_t ics) "Current ICS: 0x%x"
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e1000e_irq_read_ims(uint32_t ims) "Current IMS: 0x%x"
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e1000e_irq_icr_read_entry(uint32_t icr) "Starting ICR read. Current ICR: 0x%x"
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e1000e_irq_icr_read_exit(uint32_t icr) "Ending ICR read. Current ICR: 0x%x"
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e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS"
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e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME"
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e1000e_irq_ims_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X"
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e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X"
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e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC write 0x%x"
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e1000e_irq_fire_delayed_interrupts(void) "Firing delayed interrupts"
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e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) "Mitigation timer armed for register 0x%X, delay %"PRId64" ns"
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e1000e_irq_throttling_timer(uint32_t reg) "Mitigation timer shot for register 0x%X"
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e1000e_irq_rdtr_fpd_running(void) "FPD written while RDTR was running"
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e1000e_irq_rdtr_fpd_not_running(void) "FPD written while RDTR was not running"
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e1000e_irq_tidv_fpd_running(void) "FPD written while TIDV was running"
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e1000e_irq_tidv_fpd_not_running(void) "FPD written while TIDV was not running"
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e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) "EITR[%u] = %u"
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e1000e_irq_itr_set(uint32_t val) "ITR = %u"
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e1000e_irq_fire_all_timers(uint32_t val) "Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)"
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e1000e_irq_adding_delayed_causes(uint32_t val, uint32_t icr) "Merging delayed causes 0x%X to ICR 0x%X"
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e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) "Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u"
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e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) "Invalid configuration for cause 0x%x: 0x%x"
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e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) "Invalid entry for cause 0x%x: 0x%x"
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e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x"
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e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x"
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# hw/net/e1000e.c
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e1000e_cb_pci_realize(void) "E1000E PCI realize entry"
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e1000e_cb_pci_uninit(void) "E1000E PCI unit entry"
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e1000e_cb_qdev_reset(void) "E1000E qdev reset entry"
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e1000e_cb_pre_save(void) "E1000E pre save entry"
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e1000e_cb_post_load(void) "E1000E post load entry"
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e1000e_io_write_addr(uint64_t addr) "IOADDR write 0x%"PRIx64
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e1000e_io_write_data(uint64_t addr, uint64_t val) "IODATA write 0x%"PRIx64", value: 0x%"PRIx64
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e1000e_io_read_addr(uint64_t addr) "IOADDR read 0x%"PRIx64
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e1000e_io_read_data(uint64_t addr, uint64_t val) "IODATA read 0x%"PRIx64", value: 0x%"PRIx64
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e1000e_wrn_io_write_unknown(uint64_t addr) "IO write unknown address 0x%"PRIx64
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e1000e_wrn_io_read_unknown(uint64_t addr) "IO read unknown address 0x%"PRIx64
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e1000e_wrn_io_addr_undefined(uint64_t addr) "IO undefined register 0x%"PRIx64
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e1000e_wrn_io_addr_flash(uint64_t addr) "IO flash access (0x%"PRIx64") not implemented"
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e1000e_wrn_io_addr_unknown(uint64_t addr) "IO unknown register 0x%"PRIx64
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e1000e_msi_init_fail(int32_t res) "Failed to initialize MSI, error %d"
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e1000e_msix_init_fail(int32_t res) "Failed to initialize MSI-X, error %d"
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e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) "Failed to use MSI-X vector %d, error %d"
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e1000e_cfg_support_virtio(bool support) "Virtio header supported: %d"
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e1000e_vm_state_running(void) "VM state is running"
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e1000e_vm_state_stopped(void) "VM state is stopped"
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