qemu-e2k/target
Peter Maydell cb8278cd99 * hw: arm: Set vendor property for IMX SDHCI emulations
* sd: sdhci: Implement basic vendor specific register support
  * hw/net/imx_fec: Convert debug fprintf() to trace events
  * target/arm/cpu: adjust virtual time for all KVM arm cpus
  * Implement configurable descriptor size in ftgmac100
  * hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers
  * target/arm: More Neon decodetree conversion work
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl7olzoZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kkqD/9UtCpXnSTQemK5ejuUrhnb
 LLtth7ce+XHPIoxyEeaAR89umZkooAjFG5ySnZ5QV5b0FxWrcUyK2saDdBKNHhcG
 En2kWJxebbAbMAw+vvgWx/NgzbpTwGsdYw7h2gmwpJ0RLqjzfMxwXIm4sA3g9kHs
 d2ymitwiDvAhQZHJzJ3nWZQ4QUJyDueWuHy5mjBEjAmU3R1YkOAzNCJisq3zMzFV
 4bLhA48HnqqJc8sfDqiNSk1+NoP9BUhORHtgPmz2V2RVbT6fHsIyP+pAD+vZIPht
 NmEY86RmCbuNWrPfYSnCaqx86Jj0T5ZghFlfOlKwy+AghebsAjlQmV5QvksjR5NA
 1um0usrnsMT5AF0Hmca7wMizc2Y7Dw7OJQC8LYRWhonR78XvLJU3NNL2K+lk5CQa
 lzoBauYOZdcQcwNue+xBNN6vR1g7H0Qq0Rpq9acpuU5enjn9KV/fOTdfq6Xy5h8G
 0MVwKNtH4HuQKVJXFMXKz7eZvguqRn6aKFNa1FYobfyPHX7V9HmRyWo1nKDK2WL6
 oJ3QgH6m2Bumd9GGCDyyWWd/iEn8l+zVHaUZkdEB/msMZdjlqtXMX6AzQMvR54Kd
 Ee2wgli/O01KAfqVhk11+WCV0Xn3sAC0g3/a9Hg4n884Ef42/+pBbSH8/I+HbJiC
 ETJeogXVMrBH8v4DDrKzsQ==
 =UmOR
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200616' into staging

 * hw: arm: Set vendor property for IMX SDHCI emulations
 * sd: sdhci: Implement basic vendor specific register support
 * hw/net/imx_fec: Convert debug fprintf() to trace events
 * target/arm/cpu: adjust virtual time for all KVM arm cpus
 * Implement configurable descriptor size in ftgmac100
 * hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers
 * target/arm: More Neon decodetree conversion work

# gpg: Signature made Tue 16 Jun 2020 10:56:10 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200616: (23 commits)
  hw: arm: Set vendor property for IMX SDHCI emulations
  sd: sdhci: Implement basic vendor specific register support
  hw/net/imx_fec: Convert debug fprintf() to trace events
  target/arm/cpu: adjust virtual time for all KVM arm cpus
  Implement configurable descriptor size in ftgmac100
  hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers
  target/arm: Convert Neon VDUP (scalar) to decodetree
  target/arm: Convert Neon VTBL, VTBX to decodetree
  target/arm: Convert Neon VEXT to decodetree
  target/arm: Convert Neon 2-reg-scalar long multiplies to decodetree
  target/arm: Convert Neon 2-reg-scalar VQRDMLAH, VQRDMLSH to decodetree
  target/arm: Convert Neon 2-reg-scalar VQDMULH, VQRDMULH to decodetree
  target/arm: Convert Neon 2-reg-scalar float multiplies to decodetree
  target/arm: Convert Neon 2-reg-scalar integer multiplies to decodetree
  target/arm: Add missing TCG temp free in do_2shift_env_64()
  target/arm: Add 'static' and 'const' annotations to VSHLL function arrays
  target/arm: Convert Neon 3-reg-diff polynomial VMULL
  target/arm: Convert Neon 3-reg-diff saturating doubling multiplies
  target/arm: Convert Neon 3-reg-diff long multiplies
  target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/arm/fsl-imx25.c
#	hw/arm/fsl-imx6.c
#	hw/arm/fsl-imx6ul.c
#	hw/arm/fsl-imx7.c
2020-06-16 13:36:31 +01:00
..
alpha accel/tcg: Relax va restrictions on 64-bit guests 2020-05-15 15:25:16 +01:00
arm target/arm/cpu: adjust virtual time for all KVM arm cpus 2020-06-16 10:32:29 +01:00
cris x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
hppa softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
i386 qdev: Convert bus-less devices to qdev_realize() with Coccinelle 2020-06-15 22:06:04 +02:00
lm32 x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
m68k target/m68k: implement opcode fetoxm1 2020-06-02 13:59:02 +02:00
microblaze target/microblaze: monitor: Increase the number of registers reported 2020-05-14 16:01:02 +02:00
mips target/mips: msa: Split helpers for MULV.<B|H|W|D> 2020-06-15 20:51:04 +02:00
moxie cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
nios2 x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
openrisc softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
ppc target/ppc: Restrict PPCVirtualHypervisorClass to system-mode 2020-06-12 11:12:45 -04:00
riscv linux-user pull request 20200605-v2 2020-06-08 11:04:57 +01:00
rx target/rx/translate: Add missing fall through comment 2020-04-07 18:45:54 -07:00
s390x linux-user pull request 20200605-v2 2020-06-08 11:04:57 +01:00
sh4 gdbstub: Introduce gdb_get_float32() to get 32-bit float registers 2020-04-15 11:38:23 +01:00
sparc target/sparc/int32_helper: Extract and use excp_name_str() 2020-06-09 09:21:10 +02:00
tilegx cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
tricore target/tricore: Implement gdbstub 2020-06-01 16:55:13 +02:00
unicore32 target/unicore32: Prefer qemu_semihosting_log_out() over curses 2020-06-09 19:58:53 +02:00
xtensa softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00