James Hogan 9fbf4a58c9 target/mips: Check memory permissions with mem_idx ... When performing virtual to physical address translation, check the required privilege level based on the mem_idx rather than the mode in the hflags. This will allow EVA loads & stores to operate safely only on user memory from kernel mode. For the cases where the mmu_idx doesn't need to be overridden (mips_cpu_get_phys_page_debug() and cpu_mips_translate_address()), we calculate the required mmu_idx using cpu_mmu_index(). Note that this only tests the MIPS_HFLAG_KSU bits rather than MIPS_HFLAG_MODE, so we don't test the debug mode hflag MIPS_HFLAG_DM any longer. This should be fine as get_physical_address() only compares against MIPS_HFLAG_UM and MIPS_HFLAG_SM, neither of which should get set by compute_hflags() when MIPS_HFLAG_DM is set. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>		2017-07-20 22:42:26 +01:00
..
cpu-qom.h
cpu.c	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
cpu.h	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
dsp_helper.c
gdbstub.c
helper.c	target/mips: Check memory permissions with mem_idx	2017-07-20 22:42:26 +01:00
helper.h	target-mips: Use clz opcode	2017-01-10 08:06:11 -08:00
kvm_mips.h
kvm.c	vcpu_dirty: share the same field in CPUState for all accelerators	2017-07-04 14:30:03 +02:00
lmi_helper.c
machine.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
Makefile.objs
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
TODO
trace-events	target-mips: replace few LOG_DISAS() with trace points	2017-03-20 11:06:32 +00:00
translate_init.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
translate.c	target/mips: Decode microMIPS EVA load & store instructions	2017-07-20 22:42:26 +01:00