qemu-e2k/target/ppc
Fabiano Rosas a09410ed1f target/ppc: Remove the software TLB model of 7450 CPUs
(Applies to 7441, 7445, 7450, 7451, 7455, 7457, 7447, 7447a and 7448)

The QEMU-side software TLB implementation for the 7450 family of CPUs
is being removed due to lack of known users in the real world. The
last users in the code were removed by the two previous commits.

A brief history:

The feature was added in QEMU by commit 7dbe11acd8 ("Handle all MMU
models in switches...") with the mention that Linux was not able to
handle the TLB miss interrupts and the MMU model would be kept
disabled.

At some point later, commit 8ca3f6c382 ("Allow selection of all
defined PowerPC 74xx (aka G4) CPUs.") enabled the model for the 7450
family without further justification.

We have since the year 2011 [1] been unable to run OpenBIOS in the
7450s and have not heard of any other software that is used with those
CPUs in QEMU. Attempts were made to find a guest OS that implemented
the TLB miss handlers and none were found among Linux 5.15, FreeBSD 13,
MacOS9, MacOSX and MorphOS 3.15.

All CPUs that registered this feature were moved to an MMU model that
replaces the software TLB with a QEMU hardware TLB
implementation. They can now run the same software as the 7400 CPUs,
including the OSes mentioned above.

References:

- https://bugs.launchpad.net/qemu/+bug/812398
  https://gitlab.com/qemu-project/qemu/-/issues/86

- https://lists.nongnu.org/archive/html/qemu-ppc/2021-11/msg00289.html
  message id: 20211119134431.406753-1-farosas@linux.ibm.com

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211130230123.781844-4-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:16 +01:00
..
translate target/ppc: Add helper for frsqrtes 2021-12-17 17:57:16 +01:00
arch_dump.c target/ppc: Introduce ppc_interrupts_little_endian() 2021-07-09 10:38:18 +10:00
compat.c
cpu_init.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
cpu-models.c ppc: Add a POWER10 DD2 CPU 2021-08-27 12:41:13 +10:00
cpu-models.h ppc: Add a POWER10 DD2 CPU 2021-08-27 12:41:13 +10:00
cpu-param.h
cpu-qom.h target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
fpu_helper.c target/ppc: Use helper_todouble/tosingle in helper_xststdcsp 2021-12-17 17:57:16 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper_regs.c target/ppc: add MMCR0 PMCC bits to hflags 2021-10-21 11:42:47 +11:00
helper_regs.h
helper.h target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
insn32.decode target/ppc: Implement Vector Mask Move insns 2021-12-17 17:57:13 +01:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm_ppc.h target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
kvm-stub.c
kvm.c target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
machine.c
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: divided mmu_helper.c in 2 files 2021-08-27 12:41:13 +10:00
mfrom_table_gen.c
mfrom_table.c.inc
misc_helper.c
mmu_common.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
mmu_helper.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
mmu-book3s-v3.c target/ppc: Introduce ppc_xlate 2021-07-09 10:38:19 +10:00
mmu-book3s-v3.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash32.h target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
mmu-radix64.h target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
spr_tcg.h target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
tcg-stub.c
timebase_helper.c
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h
translate.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00