cddafd8f35
We need to handle both registers and ITS tables. While register handling is standard, ITS table handling is more challenging since the kernel API is devised so that the tables are flushed into guest RAM and not in vmstate buffers. Flushing the ITS tables on device pre_save() is too late since the guest RAM is already saved at this point. Table flushing needs to happen when we are sure the vcpus are stopped and before the last dirty page saving. The right point is RUN_STATE_FINISH_MIGRATE but sometimes the VM gets stopped before migration launch so let's simply flush the tables each time the VM gets stopped. For regular ITS registers we just can use vmstate pre_save() and post_load() callbacks. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1497023553-18411-3-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
87 lines
2.5 KiB
C
87 lines
2.5 KiB
C
/*
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* ITS support for ARM GICv3
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*
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* Copyright (c) 2015 Samsung Electronics Co., Ltd.
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* Written by Pavel Fedin
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef QEMU_ARM_GICV3_ITS_COMMON_H
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#define QEMU_ARM_GICV3_ITS_COMMON_H
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#include "hw/sysbus.h"
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#include "hw/intc/arm_gicv3_common.h"
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#define ITS_CONTROL_SIZE 0x10000
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#define ITS_TRANS_SIZE 0x10000
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#define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE)
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#define GITS_CTLR 0x0
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#define GITS_IIDR 0x4
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#define GITS_CBASER 0x80
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#define GITS_CWRITER 0x88
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#define GITS_CREADR 0x90
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#define GITS_BASER 0x100
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struct GICv3ITSState {
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SysBusDevice parent_obj;
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MemoryRegion iomem_main;
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MemoryRegion iomem_its_cntrl;
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MemoryRegion iomem_its_translation;
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GICv3State *gicv3;
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int dev_fd; /* kvm device fd if backed by kvm vgic support */
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uint64_t gits_translater_gpa;
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bool translater_gpa_known;
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/* Registers */
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uint32_t ctlr;
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uint32_t iidr;
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uint64_t cbaser;
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uint64_t cwriter;
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uint64_t creadr;
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uint64_t baser[8];
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Error *migration_blocker;
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};
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typedef struct GICv3ITSState GICv3ITSState;
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void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops);
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#define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common"
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#define ARM_GICV3_ITS_COMMON(obj) \
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OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON)
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#define ARM_GICV3_ITS_COMMON_CLASS(klass) \
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OBJECT_CLASS_CHECK(GICv3ITSCommonClass, (klass), TYPE_ARM_GICV3_ITS_COMMON)
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#define ARM_GICV3_ITS_COMMON_GET_CLASS(obj) \
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OBJECT_GET_CLASS(GICv3ITSCommonClass, (obj), TYPE_ARM_GICV3_ITS_COMMON)
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struct GICv3ITSCommonClass {
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/*< private >*/
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SysBusDeviceClass parent_class;
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/*< public >*/
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int (*send_msi)(GICv3ITSState *s, uint32_t data, uint16_t devid);
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void (*pre_save)(GICv3ITSState *s);
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void (*post_load)(GICv3ITSState *s);
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};
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typedef struct GICv3ITSCommonClass GICv3ITSCommonClass;
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#endif
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