qemu-e2k/target-mips
Paul Burton a0c8060841 target-mips: support CP0.Config4.AE bit
The read-only Config4.AE bit set denotes extended 10 bits ASID.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12 09:10:20 +01:00
..
cpu-qom.h target-mips: make cpu-qom.h not target specific 2016-05-19 13:08:05 +02:00
cpu.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
cpu.h target-mips: support CP0.Config4.AE bit 2016-07-12 09:10:20 +01:00
dsp_helper.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
gdbstub.c target-mips: Implement FCR31's R/W bitmask and related functionalities 2016-06-24 13:43:52 +01:00
helper.c target-mips: change ASID type to hold more than 8 bits 2016-07-12 09:10:19 +01:00
helper.h target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> 2016-06-24 13:41:47 +01:00
kvm_mips.h
kvm.c os-posix: include sys/mman.h 2016-06-16 18:39:03 +02:00
lmi_helper.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
machine.c target-mips: change ASID type to hold more than 8 bits 2016-07-12 09:10:19 +01:00
Makefile.objs
mips-defs.h target-mips: fix MIPS64R6-generic configuration 2015-07-15 14:07:10 +01:00
mips-semi.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
msa_helper.c softfloat: Implement run-time-configurable meaning of signaling NaN bit 2016-06-24 13:40:37 +01:00
op_helper.c target-mips: change ASID type to hold more than 8 bits 2016-07-12 09:10:19 +01:00
TODO
translate_init.c target-mips: replace MIPS64R6-generic with the real I6400 CPU model 2016-07-12 09:10:17 +01:00
translate.c target-mips: support CP0.Config4.AE bit 2016-07-12 09:10:20 +01:00