Peter Maydell d20c3ebda2 hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs ... M-profile CPUs only implement the ID registers as guest-visible if the CPU implements the Main Extension (all our current CPUs except the Cortex-M0 do). Currently we handle this by having the Cortex-M0 leave the ID register values in the ARMCPU struct as zero, but this conflicts with our design decision to make QEMU behaviour be keyed off ID register fields wherever possible. Explicitly code the ID registers in the NVIC to return 0 if the Main Extension is not implemented, so we can make the M0 model set the ARMCPU struct fields to obtain the correct behaviour without those values becoming guest-visible. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200910173855.4068-4-peter.maydell@linaro.org		2020-10-01 15:31:00 +01:00
..
allwinner-a10-pic.c
apic_common.c
apic.c	Use DECLARE_*CHECKER* when possible (--force mode)	2020-09-09 09:27:11 -04:00
arm_gic_common.c
arm_gic_kvm.c	Use DECLARE_*CHECKER* when possible (--force mode)	2020-09-09 09:27:11 -04:00
arm_gic.c
arm_gicv2m.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
arm_gicv3_common.c
arm_gicv3_cpuif.c
arm_gicv3_dist.c
arm_gicv3_its_common.c
arm_gicv3_its_kvm.c	Use DECLARE_*CHECKER* when possible (--force mode)	2020-09-09 09:27:11 -04:00
arm_gicv3_kvm.c	Use DECLARE_*CHECKER* when possible (--force mode)	2020-09-09 09:27:11 -04:00
arm_gicv3_redist.c
arm_gicv3.c
armv7m_nvic.c	hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs	2020-10-01 15:31:00 +01:00
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c	Use DECLARE_*CHECKER* macros	2020-09-09 09:27:09 -04:00
exynos4210_combiner.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
exynos4210_gic.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
gic_internal.h
gicv3_internal.h
grlib_irqmp.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
heathrow_pic.c
i8259_common.c
i8259.c	Use DECLARE_*CHECKER* macros	2020-09-09 09:27:09 -04:00
ibex_plic.c	hw/intc: ibex_plic: Honour source priorities	2020-08-21 22:37:55 -07:00
imx_avic.c
imx_gpcv2.c
intc.c
ioapic_common.c
ioapic.c
Kconfig	hw/riscv: Move sifive_plic model to hw/intc	2020-09-09 15:54:19 -07:00
lm32_pic.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
loongson_liointc.c	Use DECLARE_*CHECKER* macros	2020-09-09 09:27:09 -04:00
meson.build	hw/riscv: Move sifive_plic model to hw/intc	2020-09-09 15:54:19 -07:00
mips_gic.c
nios2_iic.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
omap_intc.c	omap_intc: Use typedef name for instance_size	2020-09-09 13:20:22 -04:00
ompic.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
openpic_kvm.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
openpic.c
pl190.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
pnv_xive_regs.h
pnv_xive.c
puv3_intc.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
realview_gic.c
rx_icu.c	qemu/atomic.h: rename atomic_ to qatomic_	2020-09-23 16:07:44 +01:00
s390_flic_kvm.c	Use DECLARE_*CHECKER* macros	2020-09-09 09:27:09 -04:00
s390_flic.c
sh_intc.c
sifive_clint.c	hw/riscv: Move sifive_clint model to hw/intc	2020-09-09 15:54:19 -07:00
sifive_plic.c	qemu/atomic.h: rename atomic_ to qatomic_	2020-09-23 16:07:44 +01:00
sifive_plic.h	sifive: Use DECLARE_*CHECKER* macros	2020-09-18 13:49:48 -04:00
slavio_intctl.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
spapr_xive_kvm.c	spapr/xive: Allocate vCPU IPIs from the vCPU contexts	2020-09-08 10:08:42 +10:00
spapr_xive.c	spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority	2020-09-08 10:08:42 +10:00
trace-events
trace.h	trace: switch position of headers to what Meson requires	2020-08-21 06:18:24 -04:00
vgic_common.h
xics_kvm.c
xics_pnv.c
xics_spapr.c
xics.c
xilinx_intc.c	Use DECLARE_*CHECKER* macros	2020-09-09 09:27:09 -04:00
xive.c	ppc/xive: Simplify error handling in xive_tctx_realize()	2020-08-13 21:07:28 +10:00
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c