a307d59434
Currently, the interfaces in the pseries machine code for assignment and setup of interrupts pass around qemu_irq objects. That was done in an attempt not to be too closely linked to the specific XICS interrupt controller. However interactions with the device tree setup made that attempt rather futile, and XICS is part of the PAPR spec anyway, so this really just meant we had to carry both the qemu_irq pointers and the XICS irq numbers around. This mess will just get worse when we add upcoming PCI MSI support, since that will require tracking a bunch more interrupt. Therefore, this patch reworks the spapr code to just use XICS irq numbers (roughly equivalent to GSIs on x86) and only retrieve the qemu_irq pointers from the XICS code when we need them (a trivial lookup). This is a reworked and generalized version of an earlier spapr_pci specific patch from Alexey Kardashevskiy. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: fix checkpath warning] Signed-off-by: Alexander Graf <agraf@suse.de>
139 lines
4.7 KiB
C
139 lines
4.7 KiB
C
#ifndef _HW_SPAPR_VIO_H
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#define _HW_SPAPR_VIO_H
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/*
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* QEMU sPAPR VIO bus definitions
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*
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* Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
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* Based on the s390 virtio bus definitions:
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* Copyright (c) 2009 Alexander Graf <agraf@suse.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "dma.h"
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#define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
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#define VIO_SPAPR_DEVICE(obj) \
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OBJECT_CHECK(VIOsPAPRDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
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#define VIO_SPAPR_DEVICE_CLASS(klass) \
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OBJECT_CLASS_CHECK(VIOsPAPRDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
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#define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(VIOsPAPRDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
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#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
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#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(VIOsPAPRBus, (obj), TYPE_SPAPR_VIO_BUS)
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struct VIOsPAPRDevice;
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typedef struct VIOsPAPR_CRQ {
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uint64_t qladdr;
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uint32_t qsize;
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uint32_t qnext;
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int(*SendFunc)(struct VIOsPAPRDevice *vdev, uint8_t *crq);
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} VIOsPAPR_CRQ;
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typedef struct VIOsPAPRDevice VIOsPAPRDevice;
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typedef struct VIOsPAPRBus VIOsPAPRBus;
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typedef struct VIOsPAPRDeviceClass {
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DeviceClass parent_class;
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const char *dt_name, *dt_type, *dt_compatible;
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target_ulong signal_mask;
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uint32_t rtce_window_size;
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int (*init)(VIOsPAPRDevice *dev);
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void (*reset)(VIOsPAPRDevice *dev);
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int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off);
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} VIOsPAPRDeviceClass;
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struct VIOsPAPRDevice {
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DeviceState qdev;
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uint32_t reg;
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uint32_t flags;
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uint32_t irq;
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target_ulong signal_state;
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VIOsPAPR_CRQ crq;
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DMAContext *dma;
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};
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#define DEFINE_SPAPR_PROPERTIES(type, field) \
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DEFINE_PROP_UINT32("reg", type, field.reg, -1)
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struct VIOsPAPRBus {
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BusState bus;
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uint32_t next_reg;
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int (*init)(VIOsPAPRDevice *dev);
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int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off);
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};
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extern VIOsPAPRBus *spapr_vio_bus_init(void);
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extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg);
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extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt);
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extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus);
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extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode);
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static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
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{
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return xics_get_qirq(spapr->icp, dev->irq);
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}
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static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,
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uint32_t size, DMADirection dir)
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{
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return dma_memory_valid(dev->dma, taddr, size, dir);
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}
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static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr,
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void *buf, uint32_t size)
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{
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return (dma_memory_read(dev->dma, taddr, buf, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr,
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const void *buf, uint32_t size)
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{
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return (dma_memory_write(dev->dma, taddr, buf, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr,
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uint8_t c, uint32_t size)
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{
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return (dma_memory_set(dev->dma, taddr, c, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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#define vio_stb(_dev, _addr, _val) (stb_dma((_dev)->dma, (_addr), (_val)))
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#define vio_sth(_dev, _addr, _val) (stw_be_dma((_dev)->dma, (_addr), (_val)))
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#define vio_stl(_dev, _addr, _val) (stl_be_dma((_dev)->dma, (_addr), (_val)))
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#define vio_stq(_dev, _addr, _val) (stq_be_dma((_dev)->dma, (_addr), (_val)))
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#define vio_ldq(_dev, _addr) (ldq_be_dma((_dev)->dma, (_addr)))
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int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq);
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VIOsPAPRDevice *vty_lookup(sPAPREnvironment *spapr, target_ulong reg);
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void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len);
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void spapr_vty_create(VIOsPAPRBus *bus, CharDriverState *chardev);
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void spapr_vlan_create(VIOsPAPRBus *bus, NICInfo *nd);
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void spapr_vscsi_create(VIOsPAPRBus *bus);
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VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus);
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int spapr_tce_set_bypass(uint32_t unit, uint32_t enable);
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void spapr_vio_quiesce(void);
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#endif /* _HW_SPAPR_VIO_H */
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