d21939ca8b
LLVM/Clang does not support __builtin_mtfsf. Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-2-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
#include <stdlib.h>
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#include <stdint.h>
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#include <assert.h>
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#include <signal.h>
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#include <sys/prctl.h>
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#define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB))
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#define MFFS(FRT) asm("mffs %0" : "=f" (FRT))
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#define FPSCR_VE 7 /* Floating-point invalid operation exception enable */
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#define FPSCR_VXSOFT 10 /* Floating-point invalid operation exception (soft) */
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#define FPSCR_FI 17 /* Floating-point fraction inexact */
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#define FP_VE (1ull << FPSCR_VE)
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#define FP_VXSOFT (1ull << FPSCR_VXSOFT)
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#define FP_FI (1ull << FPSCR_FI)
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void sigfpe_handler(int sig, siginfo_t *si, void *ucontext)
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{
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if (si->si_code == FPE_FLTINV) {
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exit(0);
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}
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exit(1);
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}
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int main(void)
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{
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uint64_t fpscr;
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struct sigaction sa = {
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.sa_sigaction = sigfpe_handler,
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.sa_flags = SA_SIGINFO
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};
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/*
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* Enable the MSR bits F0 and F1 to enable exceptions.
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* This shouldn't be needed in linux-user as these bits are enabled by
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* default, but this allows to execute either in a VM or a real machine
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* to compare the behaviors.
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*/
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prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE);
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/* First test if the FI bit is being set correctly */
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MTFSF(0b11111111, FP_FI);
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MFFS(fpscr);
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assert((fpscr & FP_FI) != 0);
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/* Then test if the deferred exception is being called correctly */
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sigaction(SIGFPE, &sa, NULL);
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/*
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* Although the VXSOFT exception has been chosen, based on test in a Power9
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* any combination of exception bit + its enabling bit should work.
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* But if a different exception is chosen si_code check should
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* change accordingly.
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*/
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MTFSF(0b11111111, FP_VE | FP_VXSOFT);
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return 1;
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}
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