3b76e18520
Wire up the refclk for the msf2 SoC. This SoC runs the refclk at a frequency which is programmably either /4, /8, /16 or /32 of the main CPU clock. We don't currently model the register which allows the guest to set the divisor, so implement the refclk as a fixed /32 of the CPU clock (which is the value of the divisor at reset). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-id: 20210812093356.1946-21-peter.maydell@linaro.org |
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authz | ||
block | ||
chardev | ||
crypto | ||
disas | ||
exec | ||
fpu | ||
hw | ||
io | ||
libdecnumber | ||
migration | ||
monitor | ||
net | ||
qapi | ||
qemu | ||
qom | ||
scsi | ||
semihosting | ||
standard-headers | ||
sysemu | ||
tcg | ||
ui | ||
user | ||
elf.h | ||
glib-compat.h | ||
qemu-common.h | ||
qemu-io.h | ||
trace-tcg.h |