qemu-e2k/target/i386
Igor Mammedov d7caf13b5f x86: cpu: fixup number of addressable IDs for logical processors sharing cache
When QEMU is started with '-cpu host,host-cache-info=on', it will
passthrough host's number of logical processors sharing cache and
number of processor cores in the physical package. QEMU already
fixes up the later to correctly reflect number of configured cores
for VM, however number of logical processors sharing cache is still
comes from host CPU, which confuses guest started with:

       -machine q35,accel=kvm \
       -cpu host,host-cache-info=on,l3-cache=off \
       -smp 20,sockets=2,dies=1,cores=10,threads=1  \
       -numa node,nodeid=0,memdev=ram-node0 \
       -numa node,nodeid=1,memdev=ram-node1 \
       -numa cpu,socket-id=0,node-id=0 \
       -numa cpu,socket-id=1,node-id=1

on 2 socket Xeon 4210R host with 10 cores per socket
with CPUID[04H]:
      ...
        --- cache 3 ---
      cache type                           = unified cache (3)
      cache level                          = 0x3 (3)
      self-initializing cache level        = true
      fully associative cache              = false
      maximum IDs for CPUs sharing cache   = 0x1f (31)
      maximum IDs for cores in pkg         = 0xf (15)
      ...
that doesn't match number of logical processors VM was
configured with and as result RHEL 9.0 guest complains:

   sched: CPU #10's llc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
   WARNING: CPU: 10 PID: 0 at arch/x86/kernel/smpboot.c:421 topology_sane.isra.0+0x67/0x80
   ...
   Call Trace:
     set_cpu_sibling_map+0x176/0x590
     start_secondary+0x5b/0x150
     secondary_startup_64_no_verify+0xc2/0xcb

Fix it by capping max number of logical processors to vcpus/socket
as it was configured, which fixes the issue.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2088311
Message-Id: <20220524151020.2541698-3-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-06-06 09:26:54 +02:00
..
hax Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
hvf Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
kvm i386: Hyper-V Direct TLB flush hypercall 2022-05-25 21:26:35 +02:00
nvmm Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
tcg target/i386/tcg: Fix masking of real-mode addresses with A20 bit 2022-06-06 09:26:53 +02:00
whpx WHPX: fixed TPR/CR8 translation issues affecting VM debugging 2022-05-14 12:32:40 +02:00
arch_dump.c
arch_memory_mapping.c
cpu-dump.c
cpu-internal.h
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h
cpu-sysemu.c
cpu.c x86: cpu: fixup number of addressable IDs for logical processors sharing cache 2022-06-06 09:26:54 +02:00
cpu.h i386: Hyper-V Direct TLB flush hypercall 2022-05-25 21:26:35 +02:00
gdbstub.c target/i386: fix byte swap issue with XMM register access 2022-04-20 16:04:20 +01:00
helper.c
helper.h
host-cpu.c
host-cpu.h
Kconfig
machine.c target/i386: Enable Arch LBR migration states in vmstate 2022-05-14 12:32:41 +02:00
meson.build
monitor.c
ops_sse_header.h
ops_sse.h i386: pcmpestr 64-bit sign extension bug 2022-04-28 08:51:56 +02:00
sev-sysemu-stub.c
sev.c qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities 2022-04-06 10:50:37 +02:00
sev.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
shift_helper_template.h
svm.h
trace-events
trace.h
xsave_helper.c