502 lines
15 KiB
C
502 lines
15 KiB
C
#include "qemu/osdep.h"
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#include "qemu.h"
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#include "exec/log.h"
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#include "disas/disas.h"
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#include "translate.h"
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struct CPUE2KStateTCG e2k_cs;
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/* returns zero if bundle is invalid */
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static target_ulong unpack_bundle(CPUE2KState *env, DisasContext *ctx)
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{
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unsigned int gap;
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unsigned int pos = 0;
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unsigned int mdl;
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unsigned int hsyll_cntr = 0;
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unsigned int i;
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uint32_t hs;
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UnpackedBundle *bundle = &ctx->bundle;
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target_ulong pc = ctx->pc;
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memset(bundle, 0, sizeof(UnpackedBundle));
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bundle->hs = hs = translator_ldl(env, &ctx->base, pc + pos);
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pos += 4;
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/* Check for SS. */
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if (GET_BIT(hs, 12)) {
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bundle->ss_present = true;
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bundle->ss = translator_ldl(env, &ctx->base, pc + pos);
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pos += 4;
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}
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/* Check for available ALS syllables. */
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for (i = 0; i < 6; i++) {
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if (GET_BIT(hs, 26 + i)) {
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bundle->als_present[i] = true;
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bundle->als[i] = translator_ldl(env, &ctx->base, pc + pos);
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pos += 4;
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}
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}
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/* Check for CS0. */
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if (GET_BIT(hs, 14)) {
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bundle->cs0_present = true;
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bundle->cs0 = translator_ldl(env, &ctx->base, pc + pos);
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pos += 4;
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}
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if (GET_BIT(hs, 25)) {
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bundle->ales_present[5] = ALES_ALLOCATED;
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bundle->ales[5] = 0x01c0;
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}
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if (GET_BIT(hs, 22)) {
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bundle->ales_present[2] = ALES_ALLOCATED;
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bundle->ales[2] = 0x01c0;
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}
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/* Calculate the size of f1 fragment in bytes. For a valid bundle it
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should be equal to either of `pos', `pos + 4' or `pos + 8'. What should I
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do if it's not? */
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/* TODO: exception */
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mdl = ((hs & 0xf) + 1) * 4;
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/* The following condition means that ALES{2,5} are physically present within
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the wide instruction. However, they should be probably taken into account
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only if HS.ale{2,5} are set. Should I disassemble them if these bits are
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not set but the syllables physically exist? */
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if ((GET_BIT(hs, 15) && mdl == pos + 8) ||
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(!GET_BIT(hs, 15) && mdl == pos + 4)) {
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/* Fill in ALES5 and ALES2 syllables even if none of them is specified in
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HS as present. This will let me output this syllable into disassembly
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whichever case takes place. */
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bundle->ales[5] = translator_lduw(env, &ctx->base, pc + pos);
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bundle->ales[2] = translator_lduw(env, &ctx->base, pc + pos + 2);
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/* Adjust `ALES_PRESENT[{5,2}]' as proposed above now that we know that
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they are allocated. */
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bundle->ales_present[5] |= ALES_PRESENT;
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bundle->ales_present[2] |= ALES_PRESENT;
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pos += 4;
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}
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/* Check for CS1. */
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if (GET_BIT(hs, 15)) {
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bundle->cs1_present = 1;
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bundle->cs1 = translator_ldl(env, &ctx->base, pc + pos);
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pos += 4;
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}
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/* A primitive control just for a moment. */
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if (mdl != pos) {
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/* This is either an APB instruction or an invalid one. Let's stupidly
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believe that the former takes place and signalize our caller about
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that by returning 0. */
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return 0;
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}
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/* Check for ALES{0,1,3,4}. */
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for (i = 0; i < 5; i++) {
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if (i == 2)
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continue;
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if (GET_BIT(hs, 20 + i)) {
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unsigned int offset = 2 * ((hsyll_cntr & ~0x1) + 1 - (hsyll_cntr & 0x1));
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bundle->ales_present[i] = ALES_PRESENT;
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/* Recall the idiotic order of half-syllables in the packed wide
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instruction. */
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bundle->ales[i] = translator_lduw(env, &ctx->base, pc + pos + offset);
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hsyll_cntr++;
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}
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}
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/* Check for AASj half-syllables. To encode them SS syllable of SF1 type
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should be present. */
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if (bundle->ss_present && !GET_BIT(bundle->ss, 20)) {
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for (i = 0; i < 4; i++) {
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if (GET_BIT(bundle->ss, 12 + i)) {
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bundle->aas_present[i >> 1] = true;
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bundle->aas_present[i + 2] = true;
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}
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}
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for (i = 0; i < 6; i++) {
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if (bundle->aas_present[i]) {
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unsigned int offset = 2 * ((hsyll_cntr & ~0x1) + 1 - (hsyll_cntr & 0x1));
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/* Recall the idiotic order of half-syllables in the packed wide
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instruction. Note that the first AAS half-syllable may share a
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syllable with the last ALES. */
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bundle->aas[i] = translator_lduw(env, &ctx->base, pc + pos + offset);
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hsyll_cntr++;
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}
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}
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}
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/* align half-syllables */
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hsyll_cntr += hsyll_cntr & 1;
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/* Calculate the next 32-bit syllable's position. It may be the uppermost LTS
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syllable. Note that I don't consider the case when LTS syllables reuse the
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values encoded in the preceding ones, though according to `iset-v5.single'
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this is quite legal. GAS doesn't produce such a code. Hopefully neither LAS
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has ever done that . . . */
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gap = pos + 2 * hsyll_cntr;
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/* Set POS to point to the last syllable in the current wide instruction and
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extract CDSj and PLSj syllables if any. */
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pos = ((GET_FIELD(hs, 4, 6) + 1) << 3) - 4;
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/* Check for CDSj syllables. */
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for (i = 0; i < GET_FIELD(hs, 16, 17); i++) {
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bundle->cds_present[i] = true;
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bundle->cds[i] = translator_ldl(env, &ctx->base, pc + pos);
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pos -= 4;
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}
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/* Check for PLSj syllables. */
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for (i = 0; i < GET_FIELD(hs, 18, 19); i++) {
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bundle->pls_present[i] = true;
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bundle->pls[i] = translator_ldl(env, &ctx->base, pc + pos);
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pos -= 4;
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}
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/* Now POS should point to the lowermost LTS0 syllable if any. If there are
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no LTSj syllables in this instruction, POS should point to the last
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syllable consisting of half-syllables.
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If neither of these conditions holds true, believe that it's not a valid
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synchronous instruction by analogy with the middle point test above.
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Engineers are said to customize instructions with references to missing
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literal syllables occasionally, but the lack of space for more substantial
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syllables should not be allowed for. */
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if (pos < gap && pos != gap - 4) {
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return 0;
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}
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/* Extract available LTSj syllables. */
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for (i = 0; i < 4 && pos >= gap; i++) {
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bundle->lts_present[i] = true;
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bundle->lts[i] = translator_ldl(env, &ctx->base, pc + pos);
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pos -= 4;
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}
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return 8 + GET_FIELD(hs, 4, 6) * 8;
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}
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static inline void save_pc(DisasContext *dc)
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{
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tcg_gen_movi_tl(e2k_cs.pc, dc->pc);
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tcg_gen_movi_tl(e2k_cs.npc, dc->npc);
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}
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static void gen_goto_tb(DisasContext *ctx, int tb_num, target_ulong pc)
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{
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if (translator_use_goto_tb(&ctx->base, pc)) {
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/* jump to same page: we can use a direct jump */
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tcg_gen_goto_tb(tb_num);
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tcg_gen_movi_tl(e2k_cs.pc, pc);
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tcg_gen_exit_tb(dc->base.tb, tb_num);
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} else {
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/* jump to another page: currently not optimized */
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tcg_gen_movi_tl(e2k_cs.pc, pc);
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tcg_gen_exit_tb(NULL, 0);
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}
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}
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void e2k_gen_exception(DisasContext *dc, int which)
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{
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TCGv_i32 t = tcg_const_i32(which);
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save_pc(dc);
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gen_helper_raise_exception(cpu_env, t);
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tcg_gen_exit_tb(NULL, 0);
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dc->base.is_jmp = DISAS_NORETURN;
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tcg_temp_free_i32(t);
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}
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static target_ulong disas_e2k_insn(DisasContext *dc, CPUState *cs)
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{
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E2KCPU *cpu = E2K_CPU(cs);
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CPUE2KState *env = &cpu->env;
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unsigned int bundle_len = unpack_bundle(env, dc);
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if (bundle_len == 0) {
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gen_exception(dc, 1);
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return dc->pc + 8;
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}
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target_ulong pc_next = dc->pc + bundle_len;
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dc->jmp.dest = tcg_const_i64(0);
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dc->jmp.cond = tcg_const_i64(0);
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e2k_alc_gen(dc);
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e2k_control_gen(dc);
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e2k_alc_commit(dc);
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e2k_win_commit(dc);
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/* Control transfer */
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switch(dc->base.is_jmp) {
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case DISAS_NEXT:
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case DISAS_TOO_MANY:
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dc->base.pc_next = pc_next;
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break;
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case DISAS_NORETURN:
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/* exception */
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tcg_gen_movi_tl(e2k_cs.pc, dc->pc);
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tcg_gen_exit_tb(NULL, 0);
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break;
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case STATIC_JUMP:
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tcg_gen_mov_i64(e2k_cs.pc, dc->jmp.dest);
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tcg_gen_exit_tb(NULL, 0);
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break;
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case DYNAMIC_JUMP: {
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TCGv_i64 one = tcg_const_i64(1);
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TCGv_i64 next = tcg_const_i64(pc_next);
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tcg_gen_movcond_i64(TCG_COND_EQ, e2k_cs.pc,
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dc->jmp.cond, one,
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dc->jmp.dest, next
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);
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tcg_temp_free_i64(next);
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tcg_temp_free_i64(one);
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tcg_gen_exit_tb(NULL, 0);
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break;
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}
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default:
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/* TODO: unreachable */
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abort();
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break;
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}
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tcg_temp_free_i64(dc->jmp.dest);
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tcg_temp_free_i64(dc->jmp.cond);
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/* Free temporary values */
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while(dc->t32_len) {
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tcg_temp_free_i32(dc->t32[--dc->t32_len]);
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}
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while(dc->t64_len) {
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tcg_temp_free_i64(dc->t64[--dc->t64_len]);
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}
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while(dc->ttl_len) {
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tcg_temp_free(dc->ttl[--dc->ttl_len]);
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}
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return pc_next;
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}
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static void e2k_tr_init_disas_context(DisasContextBase *db, CPUState *cs)
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{
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DisasContext *dc = container_of(db, DisasContext, base);
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E2KCPU *cpu = E2K_CPU(cs);
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CPUE2KState *env = &cpu->env;
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dc->pc = 0;
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dc->npc = dc->base.pc_first;
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dc->version = env->version;
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}
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static void e2k_tr_insn_start(DisasContextBase *db, CPUState *cs)
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{
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DisasContext *dc = container_of(db, DisasContext, base);
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tcg_gen_insn_start(dc->pc);
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}
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static void e2k_tr_translate_insn(DisasContextBase *db, CPUState *cs)
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{
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DisasContext *dc = container_of(db, DisasContext, base);
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E2KCPU *cpu = E2K_CPU(cs);
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CPUE2KState *env = &cpu->env;
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UnpackedBundle *bundle = &dc->bundle;
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unsigned int bundle_len;
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dc->pc = dc->npc;
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bundle_len = unpack_bundle(env, dc->pc, bundle);
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/* TODO: exception, check bundle_len */
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dc->npc = dc->base.pc_next = dc->pc + bundle_len;
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e2k_alc_gen(dc);
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e2k_control_gen(dc);
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e2k_alc_commit(dc);
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e2k_win_commit(dc);
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/* Free temporary values */
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while(dc->t32_len) {
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tcg_temp_free_i32(dc->t32[--dc->t32_len]);
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}
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while(dc->t64_len) {
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tcg_temp_free_i64(dc->t64[--dc->t64_len]);
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}
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while(dc->ttl_len) {
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tcg_temp_free(dc->ttl[--dc->ttl_len]);
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}
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}
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static void e2k_tr_tb_start(DisasContextBase *db, CPUState *cs)
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{
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tcg_gen_movi_tl(e2k_cs.cond, 0);
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tcg_gen_movi_i32(e2k_cs.call_wbs, 0);
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}
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static void e2k_tr_tb_stop(DisasContextBase *db, CPUState *cs)
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{
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DisasContext *dc = container_of(db, DisasContext, base);
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/* Control transfer */
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switch(dc->base.is_jmp) {
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case DISAS_NEXT:
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case DISAS_TOO_MANY:
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gen_goto_tb(dc, 0, dc->npc);
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break;
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case DISAS_NORETURN:
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break;
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case DISAS_JUMP_STATIC:
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gen_goto_tb(dc, 0, dc->jmp.dest);
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break;
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case DISAS_BRANCH_STATIC: {
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TCGv z = tcg_const_tl(0);
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TCGv t = tcg_const_tl(dc->jmp.dest);
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TCGv f = tcg_const_tl(dc->npc);
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tcg_gen_movcond_tl(TCG_COND_NE, e2k_cs.pc, e2k_cs.cond, z, t, f);
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tcg_gen_exit_tb(NULL, 0);
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tcg_temp_free(f);
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tcg_temp_free(t);
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tcg_temp_free(z);
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break;
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}
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case DISAS_JUMP: {
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TCGv_i32 ctpr = tcg_const_i32(dc->jump_ctpr);
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save_pc(dc);
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gen_helper_jump(e2k_cs.pc, cpu_env, ctpr);
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tcg_gen_exit_tb(NULL, 0);
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tcg_temp_free_i32(ctpr);
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break;
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}
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case DISAS_BRANCH: {
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TCGv_i32 ctpr = tcg_const_i32(dc->jump_ctpr);
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TCGv z = tcg_const_tl(0);
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TCGv t = tcg_temp_new();
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TCGv f = tcg_const_tl(dc->npc);
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save_pc(dc);
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gen_helper_branch(t, cpu_env, ctpr, e2k_cs.cond);
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tcg_gen_movcond_tl(TCG_COND_NE, e2k_cs.pc, e2k_cs.cond, z, t, f);
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tcg_gen_exit_tb(NULL, 0);
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tcg_temp_free(f);
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tcg_temp_free(t);
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tcg_temp_free(z);
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tcg_temp_free_i32(ctpr);
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break;
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}
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default:
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g_assert_not_reached();
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break;
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}
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}
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static void e2k_tr_disas_log(const DisasContextBase *db,
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CPUState *cpu, FILE *logfile)
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{
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DisasContext *dc = container_of(db, DisasContext, base);
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fprintf(logfile, "IN: %s\n", lookup_symbol(dc->base.pc_first));
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target_disas(logfile, cpu, dc->base.pc_first, dc->base.tb->size);
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}
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static const TranslatorOps e2k_tr_ops = {
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.init_disas_context = e2k_tr_init_disas_context,
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.tb_start = e2k_tr_tb_start,
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.insn_start = e2k_tr_insn_start,
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.translate_insn = e2k_tr_translate_insn,
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.tb_stop = e2k_tr_tb_stop,
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.disas_log = e2k_tr_disas_log,
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};
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void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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{
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DisasContext dc = { 0 };
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translator_loop(&e2k_tr_ops, &dc.base, cs, tb, max_insns);
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}
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void restore_state_to_opc(CPUE2KState *env, TranslationBlock *tb,
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target_ulong *data)
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{
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// TODO
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qemu_log_mask(LOG_UNIMP, "restore_state_to_opc: not implemented\n");
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}
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void e2k_tcg_initialize(void) {
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char buf[16] = { 0 };
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static const struct { TCGv_i32 *ptr; int off; const char *name; } r32[] = {
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{ &e2k_cs.call_wbs, offsetof(CPUE2KState, call_wbs), "call_wbs" },
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{ &e2k_cs.woff, offsetof(CPUE2KState, woff), "woff" },
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{ &e2k_cs.wsize, offsetof(CPUE2KState, wsize), "wsize" },
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{ &e2k_cs.boff, offsetof(CPUE2KState, boff), "boff" },
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{ &e2k_cs.bsize, offsetof(CPUE2KState, bsize), "bsize" },
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{ &e2k_cs.bcur, offsetof(CPUE2KState, bcur), "bcur" },
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{ &e2k_cs.psize, offsetof(CPUE2KState, psize), "psize" },
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{ &e2k_cs.pcur, offsetof(CPUE2KState, pcur), "pcur" },
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};
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static const struct { TCGv_i64 *ptr; int off; const char *name; } r64[] = {
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{ &e2k_cs.pregs, offsetof(CPUE2KState, pf), "pregs" },
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{ &e2k_cs.lsr, offsetof(CPUE2KState, lsr), "lsr" },
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};
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static const struct { TCGv *ptr; int off; const char *name; } rtl[] = {
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{ &e2k_cs.pc, offsetof(CPUE2KState, ip), "pc" },
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{ &e2k_cs.npc, offsetof(CPUE2KState, nip), "npc" },
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{ &e2k_cs.cond, offsetof(CPUE2KState, cond), "cond" },
|
|
};
|
|
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(r32); i++) {
|
|
*r32[i].ptr = tcg_global_mem_new_i32(cpu_env, r32[i].off, r32[i].name);
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(r64); i++) {
|
|
*r64[i].ptr = tcg_global_mem_new_i64(cpu_env, r64[i].off, r64[i].name);
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(rtl); i++) {
|
|
*rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name);
|
|
}
|
|
|
|
e2k_cs.wptr = tcg_global_mem_new_ptr(cpu_env,
|
|
offsetof(CPUE2KState, wptr), "wptr");
|
|
|
|
for (i = 0; i < WREGS_SIZE; i++) {
|
|
snprintf(buf, ARRAY_SIZE(buf), "%%r%d", i);
|
|
e2k_cs.wregs[i] = tcg_global_mem_new_i64(e2k_cs.wptr,
|
|
i * REG_SIZE, buf);
|
|
}
|
|
|
|
for (i = 0; i < GREGS_SIZE; i++) {
|
|
snprintf(buf, ARRAY_SIZE(buf), "%%g%d", i);
|
|
e2k_cs.gregs[i] = tcg_global_mem_new_i64(cpu_env,
|
|
offsetof(CPUE2KState, gregs[i]), buf);
|
|
}
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
snprintf(buf, ARRAY_SIZE(buf), "%%ctpr%d", i + 1);
|
|
e2k_cs.ctprs[i] = tcg_global_mem_new(cpu_env,
|
|
offsetof(CPUE2KState, ctprs[i]), buf);
|
|
}
|
|
}
|