a6c3ed2474
Originally the dcache-writeback PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> |
||
---|---|---|
.. | ||
boot.c | ||
boot.h | ||
Makefile.objs | ||
petalogix_ml605_mmu.c | ||
petalogix_s3adsp1800_mmu.c |