314 lines
7.9 KiB
C
314 lines
7.9 KiB
C
/*
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* Register Definition API
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*
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* Copyright (c) 2016 Xilinx Inc.
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* Copyright (c) 2013 Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include "qemu/osdep.h"
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#include "hw/register.h"
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#include "hw/qdev.h"
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#include "qemu/log.h"
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static inline void register_write_val(RegisterInfo *reg, uint64_t val)
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{
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g_assert(reg->data);
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switch (reg->data_size) {
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case 1:
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*(uint8_t *)reg->data = val;
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break;
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case 2:
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*(uint16_t *)reg->data = val;
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break;
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case 4:
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*(uint32_t *)reg->data = val;
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break;
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case 8:
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*(uint64_t *)reg->data = val;
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break;
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default:
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g_assert_not_reached();
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}
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}
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static inline uint64_t register_read_val(RegisterInfo *reg)
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{
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switch (reg->data_size) {
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case 1:
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return *(uint8_t *)reg->data;
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case 2:
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return *(uint16_t *)reg->data;
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case 4:
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return *(uint32_t *)reg->data;
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case 8:
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return *(uint64_t *)reg->data;
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default:
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g_assert_not_reached();
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}
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return 0; /* unreachable */
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}
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static inline uint64_t register_enabled_mask(int data_size, unsigned size)
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{
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if (data_size < size) {
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size = data_size;
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}
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return MAKE_64BIT_MASK(0, size * 8);
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}
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void register_write(RegisterInfo *reg, uint64_t val, uint64_t we,
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const char *prefix, bool debug)
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{
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uint64_t old_val, new_val, test, no_w_mask;
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const RegisterAccessInfo *ac;
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assert(reg);
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ac = reg->access;
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if (!ac || !ac->name) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: write to undefined device state "
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"(written value: %#" PRIx64 ")\n", prefix, val);
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return;
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}
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old_val = reg->data ? register_read_val(reg) : ac->reset;
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test = (old_val ^ val) & ac->rsvd;
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if (test) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: change of value in reserved bit"
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"fields: %#" PRIx64 ")\n", prefix, test);
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}
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test = val & ac->unimp;
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if (test) {
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qemu_log_mask(LOG_UNIMP,
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"%s:%s writing %#" PRIx64 " to unimplemented bits:" \
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" %#" PRIx64 "\n",
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prefix, reg->access->name, val, ac->unimp);
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}
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/* Create the no write mask based on the read only, write to clear and
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* reserved bit masks.
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*/
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no_w_mask = ac->ro | ac->w1c | ac->rsvd | ~we;
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new_val = (val & ~no_w_mask) | (old_val & no_w_mask);
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new_val &= ~(val & ac->w1c);
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if (ac->pre_write) {
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new_val = ac->pre_write(reg, new_val);
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}
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if (debug) {
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qemu_log("%s:%s: write of value %#" PRIx64 "\n", prefix, ac->name,
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new_val);
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}
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register_write_val(reg, new_val);
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if (ac->post_write) {
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ac->post_write(reg, new_val);
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}
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}
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uint64_t register_read(RegisterInfo *reg, uint64_t re, const char* prefix,
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bool debug)
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{
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uint64_t ret;
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const RegisterAccessInfo *ac;
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assert(reg);
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ac = reg->access;
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if (!ac || !ac->name) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: read from undefined device state\n",
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prefix);
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return 0;
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}
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ret = reg->data ? register_read_val(reg) : ac->reset;
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register_write_val(reg, ret & ~(ac->cor & re));
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/* Mask based on the read enable size */
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ret &= re;
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if (ac->post_read) {
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ret = ac->post_read(reg, ret);
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}
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if (debug) {
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qemu_log("%s:%s: read of value %#" PRIx64 "\n", prefix,
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ac->name, ret);
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}
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return ret;
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}
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void register_reset(RegisterInfo *reg)
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{
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const RegisterAccessInfo *ac;
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g_assert(reg);
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if (!reg->data || !reg->access) {
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return;
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}
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ac = reg->access;
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register_write_val(reg, reg->access->reset);
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if (ac->post_write) {
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ac->post_write(reg, reg->access->reset);
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}
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}
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void register_init(RegisterInfo *reg)
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{
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assert(reg);
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if (!reg->data || !reg->access) {
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return;
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}
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object_initialize((void *)reg, sizeof(*reg), TYPE_REGISTER);
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}
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void register_write_memory(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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{
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RegisterInfoArray *reg_array = opaque;
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RegisterInfo *reg = NULL;
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uint64_t we;
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int i;
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for (i = 0; i < reg_array->num_elements; i++) {
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if (reg_array->r[i]->access->addr == addr) {
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reg = reg_array->r[i];
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break;
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}
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}
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if (!reg) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: write to unimplemented register " \
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"at address: %#" PRIx64 "\n", reg_array->prefix, addr);
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return;
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}
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/* Generate appropriate write enable mask */
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we = register_enabled_mask(reg->data_size, size);
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register_write(reg, value, we, reg_array->prefix,
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reg_array->debug);
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}
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uint64_t register_read_memory(void *opaque, hwaddr addr,
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unsigned size)
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{
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RegisterInfoArray *reg_array = opaque;
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RegisterInfo *reg = NULL;
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uint64_t read_val;
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uint64_t re;
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int i;
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for (i = 0; i < reg_array->num_elements; i++) {
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if (reg_array->r[i]->access->addr == addr) {
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reg = reg_array->r[i];
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break;
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}
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}
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if (!reg) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: read to unimplemented register " \
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"at address: %#" PRIx64 "\n", reg_array->prefix, addr);
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return 0;
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}
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/* Generate appropriate read enable mask */
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re = register_enabled_mask(reg->data_size, size);
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read_val = register_read(reg, re, reg_array->prefix,
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reg_array->debug);
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return extract64(read_val, 0, size * 8);
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}
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RegisterInfoArray *register_init_block32(DeviceState *owner,
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const RegisterAccessInfo *rae,
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int num, RegisterInfo *ri,
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uint32_t *data,
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const MemoryRegionOps *ops,
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bool debug_enabled,
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uint64_t memory_size)
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{
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const char *device_prefix = object_get_typename(OBJECT(owner));
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RegisterInfoArray *r_array = g_new0(RegisterInfoArray, 1);
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int i;
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r_array->r = g_new0(RegisterInfo *, num);
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r_array->num_elements = num;
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r_array->debug = debug_enabled;
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r_array->prefix = device_prefix;
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for (i = 0; i < num; i++) {
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int index = rae[i].addr / 4;
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RegisterInfo *r = &ri[index];
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*r = (RegisterInfo) {
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.data = &data[index],
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.data_size = sizeof(uint32_t),
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.access = &rae[i],
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.opaque = owner,
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};
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register_init(r);
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r_array->r[i] = r;
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}
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memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array,
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device_prefix, memory_size);
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return r_array;
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}
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void register_finalize_block(RegisterInfoArray *r_array)
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{
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object_unparent(OBJECT(&r_array->mem));
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g_free(r_array->r);
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g_free(r_array);
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}
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static void register_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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/* Reason: needs to be wired up to work */
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dc->user_creatable = false;
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}
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static const TypeInfo register_info = {
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.name = TYPE_REGISTER,
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.parent = TYPE_DEVICE,
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.class_init = register_class_init,
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};
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static void register_register_types(void)
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{
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type_register_static(®ister_info);
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}
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type_init(register_register_types)
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