278 lines
8.3 KiB
C
278 lines
8.3 KiB
C
/*
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* Copyright (c) 2018, Impinj, Inc.
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*
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* i.MX7 CCM, PMU and ANALOG IP blocks emulation code
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "hw/misc/imx7_ccm.h"
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static void imx7_analog_reset(DeviceState *dev)
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{
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IMX7AnalogState *s = IMX7_ANALOG(dev);
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memset(s->pmu, 0, sizeof(s->pmu));
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memset(s->analog, 0, sizeof(s->analog));
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s->analog[ANALOG_PLL_ARM] = 0x00002042;
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s->analog[ANALOG_PLL_DDR] = 0x0060302c;
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s->analog[ANALOG_PLL_DDR_SS] = 0x00000000;
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s->analog[ANALOG_PLL_DDR_NUM] = 0x06aaac4d;
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s->analog[ANALOG_PLL_DDR_DENOM] = 0x100003ec;
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s->analog[ANALOG_PLL_480] = 0x00002000;
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s->analog[ANALOG_PLL_480A] = 0x52605a56;
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s->analog[ANALOG_PLL_480B] = 0x52525216;
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s->analog[ANALOG_PLL_ENET] = 0x00001fc0;
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s->analog[ANALOG_PLL_AUDIO] = 0x0001301b;
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s->analog[ANALOG_PLL_AUDIO_SS] = 0x00000000;
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s->analog[ANALOG_PLL_AUDIO_NUM] = 0x05f5e100;
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s->analog[ANALOG_PLL_AUDIO_DENOM] = 0x2964619c;
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s->analog[ANALOG_PLL_VIDEO] = 0x0008201b;
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s->analog[ANALOG_PLL_VIDEO_SS] = 0x00000000;
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s->analog[ANALOG_PLL_VIDEO_NUM] = 0x0000f699;
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s->analog[ANALOG_PLL_VIDEO_DENOM] = 0x000f4240;
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s->analog[ANALOG_PLL_MISC0] = 0x00000000;
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/* all PLLs need to be locked */
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s->analog[ANALOG_PLL_ARM] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_DDR] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_480] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_480A] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_480B] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_ENET] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_AUDIO] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_VIDEO] |= ANALOG_PLL_LOCK;
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s->analog[ANALOG_PLL_MISC0] |= ANALOG_PLL_LOCK;
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/*
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* Since I couldn't find any info about this in the reference
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* manual the value of this register is based strictly on matching
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* what Linux kernel expects it to be.
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*/
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s->analog[ANALOG_DIGPROG] = 0x720000;
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/*
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* Set revision to be 1.0 (Arbitrary choice, no particular
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* reason).
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*/
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s->analog[ANALOG_DIGPROG] |= 0x000010;
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}
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static void imx7_ccm_reset(DeviceState *dev)
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{
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IMX7CCMState *s = IMX7_CCM(dev);
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memset(s->ccm, 0, sizeof(s->ccm));
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}
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#define CCM_INDEX(offset) (((offset) & ~(hwaddr)0xF) / sizeof(uint32_t))
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#define CCM_BITOP(offset) ((offset) & (hwaddr)0xF)
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enum {
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CCM_BITOP_NONE = 0x00,
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CCM_BITOP_SET = 0x04,
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CCM_BITOP_CLR = 0x08,
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CCM_BITOP_TOG = 0x0C,
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};
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static uint64_t imx7_set_clr_tog_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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const uint32_t *mmio = opaque;
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return mmio[CCM_INDEX(offset)];
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}
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static void imx7_set_clr_tog_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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const uint8_t bitop = CCM_BITOP(offset);
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const uint32_t index = CCM_INDEX(offset);
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uint32_t *mmio = opaque;
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switch (bitop) {
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case CCM_BITOP_NONE:
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mmio[index] = value;
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break;
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case CCM_BITOP_SET:
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mmio[index] |= value;
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break;
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case CCM_BITOP_CLR:
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mmio[index] &= ~value;
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break;
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case CCM_BITOP_TOG:
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mmio[index] ^= value;
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break;
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};
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}
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static const struct MemoryRegionOps imx7_set_clr_tog_ops = {
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.read = imx7_set_clr_tog_read,
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.write = imx7_set_clr_tog_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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/*
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* Our device would not work correctly if the guest was doing
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* unaligned access. This might not be a limitation on the real
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* device but in practice there is no reason for a guest to access
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* this device unaligned.
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*/
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.min_access_size = 4,
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.max_access_size = 4,
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.unaligned = false,
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},
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};
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static const struct MemoryRegionOps imx7_digprog_ops = {
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.read = imx7_set_clr_tog_read,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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.min_access_size = 4,
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.max_access_size = 4,
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.unaligned = false,
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},
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};
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static void imx7_ccm_init(Object *obj)
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{
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SysBusDevice *sd = SYS_BUS_DEVICE(obj);
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IMX7CCMState *s = IMX7_CCM(obj);
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memory_region_init_io(&s->iomem,
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obj,
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&imx7_set_clr_tog_ops,
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s->ccm,
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TYPE_IMX7_CCM ".ccm",
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sizeof(s->ccm));
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sysbus_init_mmio(sd, &s->iomem);
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}
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static void imx7_analog_init(Object *obj)
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{
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SysBusDevice *sd = SYS_BUS_DEVICE(obj);
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IMX7AnalogState *s = IMX7_ANALOG(obj);
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memory_region_init(&s->mmio.container, obj, TYPE_IMX7_ANALOG,
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0x10000);
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memory_region_init_io(&s->mmio.analog,
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obj,
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&imx7_set_clr_tog_ops,
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s->analog,
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TYPE_IMX7_ANALOG,
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sizeof(s->analog));
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memory_region_add_subregion(&s->mmio.container,
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0x60, &s->mmio.analog);
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memory_region_init_io(&s->mmio.pmu,
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obj,
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&imx7_set_clr_tog_ops,
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s->pmu,
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TYPE_IMX7_ANALOG ".pmu",
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sizeof(s->pmu));
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memory_region_add_subregion(&s->mmio.container,
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0x200, &s->mmio.pmu);
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memory_region_init_io(&s->mmio.digprog,
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obj,
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&imx7_digprog_ops,
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&s->analog[ANALOG_DIGPROG],
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TYPE_IMX7_ANALOG ".digprog",
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sizeof(uint32_t));
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memory_region_add_subregion_overlap(&s->mmio.container,
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0x800, &s->mmio.digprog, 10);
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sysbus_init_mmio(sd, &s->mmio.container);
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}
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static const VMStateDescription vmstate_imx7_ccm = {
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.name = TYPE_IMX7_CCM,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(ccm, IMX7CCMState, CCM_MAX),
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VMSTATE_END_OF_LIST()
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},
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};
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static uint32_t imx7_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
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{
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/*
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* This function is "consumed" by GPT emulation code, however on
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* i.MX7 each GPT block can have their own clock root. This means
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* that this functions needs somehow to know requester's identity
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* and the way to pass it: be it via additional IMXClk constants
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* or by adding another argument to this method needs to be
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* figured out
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*/
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qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Not implemented\n",
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TYPE_IMX7_CCM, __func__);
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return 0;
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}
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static void imx7_ccm_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
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dc->reset = imx7_ccm_reset;
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dc->vmsd = &vmstate_imx7_ccm;
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dc->desc = "i.MX7 Clock Control Module";
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ccm->get_clock_frequency = imx7_ccm_get_clock_frequency;
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}
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static const TypeInfo imx7_ccm_info = {
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.name = TYPE_IMX7_CCM,
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.parent = TYPE_IMX_CCM,
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.instance_size = sizeof(IMX7CCMState),
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.instance_init = imx7_ccm_init,
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.class_init = imx7_ccm_class_init,
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};
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static const VMStateDescription vmstate_imx7_analog = {
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.name = TYPE_IMX7_ANALOG,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(analog, IMX7AnalogState, ANALOG_MAX),
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VMSTATE_UINT32_ARRAY(pmu, IMX7AnalogState, PMU_MAX),
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VMSTATE_END_OF_LIST()
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},
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};
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static void imx7_analog_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = imx7_analog_reset;
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dc->vmsd = &vmstate_imx7_analog;
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dc->desc = "i.MX7 Analog Module";
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}
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static const TypeInfo imx7_analog_info = {
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.name = TYPE_IMX7_ANALOG,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IMX7AnalogState),
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.instance_init = imx7_analog_init,
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.class_init = imx7_analog_class_init,
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};
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static void imx7_ccm_register_type(void)
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{
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type_register_static(&imx7_ccm_info);
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type_register_static(&imx7_analog_info);
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}
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type_init(imx7_ccm_register_type)
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