qemu-e2k/target
Max Filippov a7d479ee51 target/xtensa: implement NMI support
When NMI is configured it is taken regardless of INTENABLE SR contents,
PS.INTLEVEL or PS.EXCM. It is cleared automatically once it's taken.

Add nmi_level to XtensaConfig, puth there NMI level from the overlay or
XCHAL_NUM_INTLEVELS + 1 when NMI is not configured. Add NMI mask to
INTENABLE SR and limit CINTLEVEL to nmi_level - 1 when determining
pending IRQ level in check_interrupt(). Always take and clear pending
interrupt at nmi_level in the handle_interrupt().

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-08-21 12:48:14 -07:00
..
alpha meson: target 2020-08-21 06:30:35 -04:00
arm meson: target 2020-08-21 06:30:35 -04:00
avr meson: target 2020-08-21 06:30:35 -04:00
cris meson: target 2020-08-21 06:30:35 -04:00
hppa meson: target 2020-08-21 06:30:35 -04:00
i386 meson: target 2020-08-21 06:30:35 -04:00
lm32 meson: target 2020-08-21 06:30:35 -04:00
m68k meson: target 2020-08-21 06:30:35 -04:00
microblaze meson: target 2020-08-21 06:30:35 -04:00
mips meson: target 2020-08-21 06:30:35 -04:00
moxie meson: target 2020-08-21 06:30:35 -04:00
nios2 meson: target 2020-08-21 06:30:35 -04:00
openrisc meson: target 2020-08-21 06:30:35 -04:00
ppc meson: target 2020-08-21 06:30:35 -04:00
riscv meson: target 2020-08-21 06:30:35 -04:00
rx meson: target 2020-08-21 06:30:35 -04:00
s390x meson: link emulators without Makefile.target 2020-08-21 06:30:40 -04:00
sh4 meson: target 2020-08-21 06:30:35 -04:00
sparc meson: target 2020-08-21 06:30:35 -04:00
tilegx meson: target 2020-08-21 06:30:35 -04:00
tricore meson: target 2020-08-21 06:30:35 -04:00
unicore32 meson: target 2020-08-21 06:30:35 -04:00
xtensa target/xtensa: implement NMI support 2020-08-21 12:48:14 -07:00
meson.build meson: target 2020-08-21 06:30:35 -04:00