95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU loongson 3a5000 develop board emulation
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qemu/datadir.h"
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#include "qapi/error.h"
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#include "hw/boards.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/qtest.h"
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#include "sysemu/runstate.h"
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#include "sysemu/reset.h"
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#include "sysemu/rtc.h"
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#include "hw/loongarch/virt.h"
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#include "exec/address-spaces.h"
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#include "target/loongarch/cpu.h"
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static void loongarch_init(MachineState *machine)
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{
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const char *cpu_model = machine->cpu_type;
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ram_addr_t offset = 0;
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ram_addr_t ram_size = machine->ram_size;
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uint64_t highram_size = 0;
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MemoryRegion *address_space_mem = get_system_memory();
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LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
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int i;
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if (!cpu_model) {
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cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
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}
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if (!strstr(cpu_model, "la464")) {
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error_report("LoongArch/TCG needs cpu type la464");
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exit(1);
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}
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if (ram_size < 1 * GiB) {
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error_report("ram_size must be greater than 1G.");
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exit(1);
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}
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/* Init CPUs */
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for (i = 0; i < machine->smp.cpus; i++) {
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cpu_create(machine->cpu_type);
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}
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/* Add memory region */
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memory_region_init_alias(&lams->lowmem, NULL, "loongarch.lowram",
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machine->ram, 0, 256 * MiB);
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memory_region_add_subregion(address_space_mem, offset, &lams->lowmem);
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offset += 256 * MiB;
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highram_size = ram_size - 256 * MiB;
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memory_region_init_alias(&lams->highmem, NULL, "loongarch.highmem",
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machine->ram, offset, highram_size);
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memory_region_add_subregion(address_space_mem, 0x90000000, &lams->highmem);
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/* Add isa io region */
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memory_region_init_alias(&lams->isa_io, NULL, "isa-io",
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get_system_io(), 0, LOONGARCH_ISA_IO_SIZE);
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memory_region_add_subregion(address_space_mem, LOONGARCH_ISA_IO_BASE,
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&lams->isa_io);
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}
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static void loongarch_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Loongson-3A5000 LS7A1000 machine";
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mc->init = loongarch_init;
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mc->default_ram_size = 1 * GiB;
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mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
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mc->default_ram_id = "loongarch.ram";
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mc->max_cpus = LOONGARCH_MAX_VCPUS;
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mc->is_default = 1;
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mc->default_kernel_irqchip_split = false;
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mc->block_default_type = IF_VIRTIO;
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mc->default_boot_order = "c";
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mc->no_cdrom = 1;
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}
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static const TypeInfo loongarch_machine_types[] = {
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{
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.name = TYPE_LOONGARCH_MACHINE,
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.parent = TYPE_MACHINE,
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.instance_size = sizeof(LoongArchMachineState),
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.class_init = loongarch_class_init,
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}
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};
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DEFINE_TYPES(loongarch_machine_types)
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