qemu-e2k/target-arm
Sergey Fedorov 577bf80895 target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code
AArch32 translation code does not distinguish between DISAS_UPDATE and
DISAS_JUMP. Thus, we cannot use any of them without first updating PC in
CPU state. Furthermore, it is too complicated to update PC in CPU state
before PC gets updated in disas context. So it is hardly possible to
correctly end TB early if is is not likely to be executed before calling
disas_*_insn(), e.g. just after calling breakpoint check helper.

Modify DISAS_UPDATE and DISAS_JUMP usage in AArch32 translation and
apply to them the same semantic as AArch64 translation does:
 - DISAS_UPDATE: update PC in CPU state when finishing translation
 - DISAS_JUMP:   preserve current PC value in CPU state when finishing
                 translation

This patch fixes a bug in AArch32 breakpoint handling: when
check_breakpoints helper does not generate an exception, ending the TB
early with DISAS_UPDATE couldn't update PC in CPU state and execution
hangs.

Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1447097859-586-1-git-send-email-serge.fdrv@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10 13:37:33 +00:00
..
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
arm-semi.c target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block 2015-09-07 10:39:28 +01:00
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
cpu-qom.h target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
cpu.c qdev: Protect device-list-properties against broken devices 2015-10-09 15:25:57 +02:00
cpu.h target-arm: Add HPFAR_EL2 2015-10-27 15:59:46 +00:00
cpu64.c target-arm: Fix REVIDR reset value 2015-06-15 18:06:08 +01:00
crypto_helper.c crypto: move built-in AES implementation into crypto/ 2015-07-07 12:04:13 +02:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
gdbstub64.c target-arm/gdbstub64.c: remove useless 'break' statement. 2014-04-17 21:34:06 +01:00
helper-a64.c target-arm: Use new revbit functions 2015-09-15 07:45:33 -07:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Add and use symbolic names for register banks 2015-11-03 13:49:41 +00:00
helper.h target-arm: Fix CPU breakpoint handling 2015-10-16 14:48:56 +01:00
internals.h target-arm: Add and use symbolic names for register banks 2015-11-03 13:49:41 +00:00
iwmmxt_helper.c target-arm: Delete unused iwmmxt_msadb helper 2014-06-09 16:06:12 +01:00
kvm-consts.h target-arm/kvm64: Add cortex-a53 cpu support 2015-06-15 18:06:08 +01:00
kvm-stub.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
kvm.c kvm: Pass PCI device pointer to MSI routing functions 2015-10-19 10:13:07 +02:00
kvm32.c target-arm: Add and use symbolic names for register banks 2015-11-03 13:49:41 +00:00
kvm64.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm_arm.h hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
machine.c hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
neon_helper.c target-arm: add support for v8 VMULL.P64 instruction 2014-06-09 16:06:11 +01:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Fix gdb singlestep handling in arm_debug_excp_handler() 2015-11-10 13:37:32 +00:00
psci.c target-arm: Use the kernel's idea of MPIDR if we're using KVM 2015-06-15 18:06:09 +01:00
translate-a64.c target-arm: Report S/NS status in the CPU debug logs 2015-11-03 13:49:42 +00:00
translate.c target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code 2015-11-10 13:37:33 +00:00
translate.h tcg: Remove gen_intermediate_code_pc 2015-10-07 20:36:52 +11:00