a2531bb855
QEMU includes some models of old Arm machine types which are a bit problematic for us because: * they're written in a very old way that uses numerous APIs that we would like to get away from (eg they don't use qdev, they use qemu_system_reset_request(), they use vmstate_register(), etc) * they've been that way for a decade plus and nobody particularly has stepped up to try to modernise the code (beyond some occasional work here and there) * we often don't have test cases for them, which means that if we do try to do the necessary refactoring work on them we have no idea if they even still work at all afterwards All these machine types are also of hardware that has largely passed away into history and where I would not be surprised to find that e.g. the Linux kernel support was never tested on real hardware any more. After some consultation with the Linux kernel developers, we are going to deprecate: All PXA2xx machines: akita Sharp SL-C1000 (Akita) PDA (PXA270) borzoi Sharp SL-C3100 (Borzoi) PDA (PXA270) connex Gumstix Connex (PXA255) mainstone Mainstone II (PXA27x) spitz Sharp SL-C3000 (Spitz) PDA (PXA270) terrier Sharp SL-C3200 (Terrier) PDA (PXA270) tosa Sharp SL-6000 (Tosa) PDA (PXA255) verdex Gumstix Verdex Pro XL6P COMs (PXA270) z2 Zipit Z2 (PXA27x) All OMAP2 machines: n800 Nokia N800 tablet aka. RX-34 (OMAP2420) n810 Nokia N810 tablet aka. RX-44 (OMAP2420) One of the OMAP1 machines: cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310) Rationale: * for QEMU dropping individual machines is much less beneficial than if we can drop support for an entire SoC * the OMAP2 QEMU code in particular is large, old and unmaintained, and none of the OMAP2 kernel maintainers said they were using QEMU in any of their testing/development * although there is a setup that is booting test kernels on some of the PXA2xx machines, nobody seemed to be using them as part of their active kernel development and my impression from the email thread is that PXA is the closest of all these SoC families to being dropped from the kernel soon * nobody said they were using cheetah, so it's entirely untested and quite probably broken * on the other hand the OMAP1 sx1 model does seem to be being used as part of kernel development, and there was interest in keeping collie around In particular, the mainstone, tosa and z2 machine types have already been dropped from Linux. Mark all these machine types as deprecated. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240308171621.3749894-1-peter.maydell@linaro.org
176 lines
5.3 KiB
C
176 lines
5.3 KiB
C
/*
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* PXA270-based Intel Mainstone platforms.
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*
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* Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
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* <akuster@mvista.com>
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*
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* Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "hw/arm/pxa.h"
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#include "hw/arm/boot.h"
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#include "net/net.h"
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#include "hw/net/smc91c111.h"
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#include "hw/boards.h"
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#include "hw/block/flash.h"
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#include "hw/sysbus.h"
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#include "exec/address-spaces.h"
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/* Device addresses */
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#define MST_FPGA_PHYS 0x08000000
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#define MST_ETH_PHYS 0x10000300
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#define MST_FLASH_0 0x00000000
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#define MST_FLASH_1 0x04000000
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/* IRQ definitions */
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#define MMC_IRQ 0
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#define USIM_IRQ 1
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#define USBC_IRQ 2
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#define ETHERNET_IRQ 3
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#define AC97_IRQ 4
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#define PEN_IRQ 5
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#define MSINS_IRQ 6
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#define EXBRD_IRQ 7
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#define S0_CD_IRQ 9
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#define S0_STSCHG_IRQ 10
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#define S0_IRQ 11
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#define S1_CD_IRQ 13
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#define S1_STSCHG_IRQ 14
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#define S1_IRQ 15
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static const struct keymap map[0xE0] = {
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[0 ... 0xDF] = { -1, -1 },
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[0x1e] = {0,0}, /* a */
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[0x30] = {0,1}, /* b */
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[0x2e] = {0,2}, /* c */
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[0x20] = {0,3}, /* d */
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[0x12] = {0,4}, /* e */
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[0x21] = {0,5}, /* f */
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[0x22] = {1,0}, /* g */
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[0x23] = {1,1}, /* h */
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[0x17] = {1,2}, /* i */
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[0x24] = {1,3}, /* j */
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[0x25] = {1,4}, /* k */
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[0x26] = {1,5}, /* l */
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[0x32] = {2,0}, /* m */
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[0x31] = {2,1}, /* n */
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[0x18] = {2,2}, /* o */
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[0x19] = {2,3}, /* p */
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[0x10] = {2,4}, /* q */
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[0x13] = {2,5}, /* r */
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[0x1f] = {3,0}, /* s */
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[0x14] = {3,1}, /* t */
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[0x16] = {3,2}, /* u */
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[0x2f] = {3,3}, /* v */
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[0x11] = {3,4}, /* w */
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[0x2d] = {3,5}, /* x */
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[0x34] = {4,0}, /* . */
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[0x15] = {4,2}, /* y */
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[0x2c] = {4,3}, /* z */
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[0x35] = {4,4}, /* / */
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[0xc7] = {5,0}, /* Home */
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[0x2a] = {5,1}, /* shift */
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/*
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* There are two matrix positions which map to space,
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* but QEMU can only use one of them for the reverse
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* mapping, so simply use the second one.
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*/
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/* [0x39] = {5,2}, space */
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[0x39] = {5,3}, /* space */
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/*
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* Matrix position {5,4} and other keys are missing here.
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* TODO: Compare with Linux code and test real hardware.
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*/
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[0x1c] = {5,4}, /* enter */
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[0x0e] = {5,5}, /* backspace */
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[0xc8] = {6,0}, /* up */
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[0xd0] = {6,1}, /* down */
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[0xcb] = {6,2}, /* left */
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[0xcd] = {6,3}, /* right */
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};
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enum mainstone_model_e { mainstone };
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#define MAINSTONE_RAM_SIZE (64 * MiB)
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#define MAINSTONE_ROM_SIZE (8 * MiB)
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#define MAINSTONE_FLASH_SIZE (32 * MiB)
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static struct arm_boot_info mainstone_binfo = {
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.loader_start = PXA2XX_SDRAM_BASE,
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.ram_size = MAINSTONE_RAM_SIZE,
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};
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#define FLASH_SECTOR_SIZE (256 * KiB)
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static void mainstone_common_init(MachineState *machine,
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enum mainstone_model_e model, int arm_id)
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{
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hwaddr mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
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PXA2xxState *mpu;
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DeviceState *mst_irq;
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DriveInfo *dinfo;
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int i;
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MemoryRegion *rom = g_new(MemoryRegion, 1);
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/* Setup CPU & memory */
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mpu = pxa270_init(mainstone_binfo.ram_size, machine->cpu_type);
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memory_region_init_rom(rom, NULL, "mainstone.rom", MAINSTONE_ROM_SIZE,
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&error_fatal);
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memory_region_add_subregion(get_system_memory(), 0x00000000, rom);
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/* There are two 32MiB flash devices on the board */
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for (i = 0; i < 2; i ++) {
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dinfo = drive_get(IF_PFLASH, 0, i);
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pflash_cfi01_register(mainstone_flash_base[i],
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i ? "mainstone.flash1" : "mainstone.flash0",
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MAINSTONE_FLASH_SIZE,
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dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
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FLASH_SECTOR_SIZE, 4, 0, 0, 0, 0, 0);
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}
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mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
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qdev_get_gpio_in(mpu->gpio, 0));
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/* setup keypad */
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pxa27x_register_keypad(mpu->kp, map, 0xe0);
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/* MMC/SD host */
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pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
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pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0],
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qdev_get_gpio_in(mst_irq, S0_IRQ),
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qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
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pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1],
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qdev_get_gpio_in(mst_irq, S1_IRQ),
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qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
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smc91c111_init(MST_ETH_PHYS, qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
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mainstone_binfo.board_id = arm_id;
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arm_load_kernel(mpu->cpu, machine, &mainstone_binfo);
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}
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static void mainstone_init(MachineState *machine)
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{
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mainstone_common_init(machine, mainstone, 0x196);
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}
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static void mainstone2_machine_init(MachineClass *mc)
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{
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mc->desc = "Mainstone II (PXA27x)";
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mc->init = mainstone_init;
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mc->ignore_memory_transaction_failures = true;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
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mc->deprecation_reason = "machine is old and unmaintained";
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}
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DEFINE_MACHINE("mainstone", mainstone2_machine_init)
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