qemu-e2k/target
Richard Henderson 628fc75f3a target/arm: Fix LD1W and LDFF1W (scalar plus vector)
'I' was being double-incremented; correctly within the inner loop
and incorrectly within the outer loop.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180711103957.3040-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-16 17:18:41 +01:00
..
alpha
arm target/arm: Fix LD1W and LDFF1W (scalar plus vector) 2018-07-16 17:18:41 +01:00
cris
hppa
i386 i386: fix '-cpu ?' output for host cpu type 2018-07-06 18:39:19 +02:00
lm32
m68k
microblaze
mips
moxie
nios2
openrisc target/openrisc: Fix writes to interrupt mask register 2018-07-03 22:40:33 +09:00
ppc target/ppc: fix build on ppc64 host 2018-07-07 12:12:27 +10:00
riscv
s390x
sh4 target/sh4: Fix translator.c assertion failure for gUSA 2018-07-09 10:34:04 -07:00
sparc
tilegx
tricore
unicore32
xtensa