b6509e35b9
GDB single-stepping is now handled generically. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
463 lines
12 KiB
C
463 lines
12 KiB
C
/*
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* RX helper functions
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*
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* Copyright (c) 2019 Yoshinori Sato
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/bitops.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "exec/cpu_ldst.h"
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#include "fpu/softfloat.h"
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static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
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uintptr_t retaddr);
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static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte)
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{
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uint32_t prev_u;
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prev_u = env->psw_u;
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rx_cpu_unpack_psw(env, psw, rte);
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if (prev_u != env->psw_u) {
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/* switch r0 */
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if (env->psw_u) {
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env->isp = env->regs[0];
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env->regs[0] = env->usp;
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} else {
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env->usp = env->regs[0];
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env->regs[0] = env->isp;
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}
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}
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}
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void helper_set_psw(CPURXState *env, uint32_t psw)
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{
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_set_psw(env, psw, 0);
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}
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void helper_set_psw_rte(CPURXState *env, uint32_t psw)
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{
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_set_psw(env, psw, 1);
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}
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uint32_t helper_pack_psw(CPURXState *env)
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{
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return rx_cpu_pack_psw(env);
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}
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#define SET_FPSW(b) \
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do { \
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env->fpsw = FIELD_DP32(env->fpsw, FPSW, C ## b, 1); \
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if (!FIELD_EX32(env->fpsw, FPSW, E ## b)) { \
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env->fpsw = FIELD_DP32(env->fpsw, FPSW, F ## b, 1); \
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} \
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} while (0)
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/* fp operations */
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static void update_fpsw(CPURXState *env, float32 ret, uintptr_t retaddr)
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{
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int xcpt, cause, enable;
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env->psw_z = ret & ~(1 << 31); /* mask sign bit */
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env->psw_s = ret;
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xcpt = get_float_exception_flags(&env->fp_status);
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/* Clear the cause entries */
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env->fpsw = FIELD_DP32(env->fpsw, FPSW, CAUSE, 0);
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/* set FPSW */
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if (unlikely(xcpt)) {
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if (xcpt & float_flag_invalid) {
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SET_FPSW(V);
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}
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if (xcpt & float_flag_divbyzero) {
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SET_FPSW(Z);
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}
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if (xcpt & float_flag_overflow) {
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SET_FPSW(O);
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}
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if (xcpt & float_flag_underflow) {
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SET_FPSW(U);
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}
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if (xcpt & float_flag_inexact) {
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SET_FPSW(X);
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}
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if ((xcpt & (float_flag_input_denormal
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| float_flag_output_denormal))
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&& !FIELD_EX32(env->fpsw, FPSW, DN)) {
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env->fpsw = FIELD_DP32(env->fpsw, FPSW, CE, 1);
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}
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/* update FPSW_FLAG_S */
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if (FIELD_EX32(env->fpsw, FPSW, FLAGS) != 0) {
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env->fpsw = FIELD_DP32(env->fpsw, FPSW, FS, 1);
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}
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/* Generate an exception if enabled */
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cause = FIELD_EX32(env->fpsw, FPSW, CAUSE);
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enable = FIELD_EX32(env->fpsw, FPSW, ENABLE);
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enable |= 1 << 5; /* CE always enabled */
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if (cause & enable) {
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raise_exception(env, 21, retaddr);
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}
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}
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}
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void helper_set_fpsw(CPURXState *env, uint32_t val)
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{
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static const int roundmode[] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down,
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};
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uint32_t fpsw = env->fpsw;
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fpsw |= 0x7fffff03;
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val &= ~0x80000000;
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fpsw &= val;
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FIELD_DP32(fpsw, FPSW, FS, FIELD_EX32(fpsw, FPSW, FLAGS) != 0);
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env->fpsw = fpsw;
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set_float_rounding_mode(roundmode[FIELD_EX32(env->fpsw, FPSW, RM)],
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&env->fp_status);
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}
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#define FLOATOP(op, func) \
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float32 helper_##op(CPURXState *env, float32 t0, float32 t1) \
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{ \
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float32 ret; \
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ret = func(t0, t1, &env->fp_status); \
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update_fpsw(env, *(uint32_t *)&ret, GETPC()); \
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return ret; \
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}
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FLOATOP(fadd, float32_add)
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FLOATOP(fsub, float32_sub)
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FLOATOP(fmul, float32_mul)
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FLOATOP(fdiv, float32_div)
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void helper_fcmp(CPURXState *env, float32 t0, float32 t1)
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{
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int st;
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st = float32_compare(t0, t1, &env->fp_status);
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update_fpsw(env, 0, GETPC());
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env->psw_z = 1;
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env->psw_s = env->psw_o = 0;
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switch (st) {
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case float_relation_equal:
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env->psw_z = 0;
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break;
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case float_relation_less:
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env->psw_s = -1;
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break;
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case float_relation_unordered:
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env->psw_o = -1;
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break;
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}
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}
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uint32_t helper_ftoi(CPURXState *env, float32 t0)
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{
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uint32_t ret;
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ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
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update_fpsw(env, ret, GETPC());
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return ret;
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}
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uint32_t helper_round(CPURXState *env, float32 t0)
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{
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uint32_t ret;
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ret = float32_to_int32(t0, &env->fp_status);
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update_fpsw(env, ret, GETPC());
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return ret;
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}
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float32 helper_itof(CPURXState *env, uint32_t t0)
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{
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float32 ret;
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ret = int32_to_float32(t0, &env->fp_status);
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update_fpsw(env, ret, GETPC());
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return ret;
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}
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/* string operations */
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void helper_scmpu(CPURXState *env)
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{
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uint8_t tmp0, tmp1;
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if (env->regs[3] == 0) {
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return;
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}
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do {
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tmp0 = cpu_ldub_data_ra(env, env->regs[1]++, GETPC());
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tmp1 = cpu_ldub_data_ra(env, env->regs[2]++, GETPC());
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env->regs[3]--;
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if (tmp0 != tmp1 || tmp0 == '\0') {
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break;
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}
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} while (env->regs[3] != 0);
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env->psw_z = tmp0 - tmp1;
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env->psw_c = (tmp0 >= tmp1);
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}
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static uint32_t (* const cpu_ldufn[])(CPUArchState *env,
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target_ulong ptr,
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uintptr_t retaddr) = {
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cpu_ldub_data_ra, cpu_lduw_data_ra, cpu_ldl_data_ra,
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};
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static uint32_t (* const cpu_ldfn[])(CPUArchState *env,
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target_ulong ptr,
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uintptr_t retaddr) = {
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cpu_ldub_data_ra, cpu_lduw_data_ra, cpu_ldl_data_ra,
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};
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static void (* const cpu_stfn[])(CPUArchState *env,
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target_ulong ptr,
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uint32_t val,
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uintptr_t retaddr) = {
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cpu_stb_data_ra, cpu_stw_data_ra, cpu_stl_data_ra,
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};
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void helper_sstr(CPURXState *env, uint32_t sz)
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{
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tcg_debug_assert(sz < 3);
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while (env->regs[3] != 0) {
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cpu_stfn[sz](env, env->regs[1], env->regs[2], GETPC());
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env->regs[1] += 1 << sz;
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env->regs[3]--;
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}
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}
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#define OP_SMOVU 1
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#define OP_SMOVF 0
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#define OP_SMOVB 2
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static void smov(uint32_t mode, CPURXState *env)
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{
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uint8_t tmp;
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int dir;
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dir = (mode & OP_SMOVB) ? -1 : 1;
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while (env->regs[3] != 0) {
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tmp = cpu_ldub_data_ra(env, env->regs[2], GETPC());
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cpu_stb_data_ra(env, env->regs[1], tmp, GETPC());
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env->regs[1] += dir;
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env->regs[2] += dir;
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env->regs[3]--;
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if ((mode & OP_SMOVU) && tmp == 0) {
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break;
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}
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}
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}
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void helper_smovu(CPURXState *env)
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{
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smov(OP_SMOVU, env);
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}
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void helper_smovf(CPURXState *env)
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{
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smov(OP_SMOVF, env);
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}
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void helper_smovb(CPURXState *env)
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{
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smov(OP_SMOVB, env);
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}
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void helper_suntil(CPURXState *env, uint32_t sz)
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{
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uint32_t tmp;
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tcg_debug_assert(sz < 3);
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if (env->regs[3] == 0) {
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return ;
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}
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do {
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tmp = cpu_ldufn[sz](env, env->regs[1], GETPC());
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env->regs[1] += 1 << sz;
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env->regs[3]--;
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if (tmp == env->regs[2]) {
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break;
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}
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} while (env->regs[3] != 0);
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env->psw_z = tmp - env->regs[2];
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env->psw_c = (tmp <= env->regs[2]);
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}
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void helper_swhile(CPURXState *env, uint32_t sz)
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{
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uint32_t tmp;
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tcg_debug_assert(sz < 3);
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if (env->regs[3] == 0) {
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return ;
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}
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do {
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tmp = cpu_ldufn[sz](env, env->regs[1], GETPC());
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env->regs[1] += 1 << sz;
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env->regs[3]--;
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if (tmp != env->regs[2]) {
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break;
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}
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} while (env->regs[3] != 0);
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env->psw_z = env->regs[3];
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env->psw_c = (tmp <= env->regs[2]);
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}
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/* accumulator operations */
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void helper_rmpa(CPURXState *env, uint32_t sz)
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{
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uint64_t result_l, prev;
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int32_t result_h;
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int64_t tmp0, tmp1;
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if (env->regs[3] == 0) {
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return;
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}
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result_l = env->regs[5];
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result_l <<= 32;
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result_l |= env->regs[4];
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result_h = env->regs[6];
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env->psw_o = 0;
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while (env->regs[3] != 0) {
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tmp0 = cpu_ldfn[sz](env, env->regs[1], GETPC());
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tmp1 = cpu_ldfn[sz](env, env->regs[2], GETPC());
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tmp0 *= tmp1;
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prev = result_l;
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result_l += tmp0;
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/* carry / bollow */
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if (tmp0 < 0) {
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if (prev > result_l) {
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result_h--;
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}
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} else {
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if (prev < result_l) {
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result_h++;
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}
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}
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env->regs[1] += 1 << sz;
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env->regs[2] += 1 << sz;
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}
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env->psw_s = result_h;
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env->psw_o = (result_h != 0 && result_h != -1) << 31;
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env->regs[6] = result_h;
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env->regs[5] = result_l >> 32;
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env->regs[4] = result_l & 0xffffffff;
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}
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void helper_racw(CPURXState *env, uint32_t imm)
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{
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int64_t acc;
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acc = env->acc;
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acc <<= (imm + 1);
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acc += 0x0000000080000000LL;
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if (acc > 0x00007fff00000000LL) {
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acc = 0x00007fff00000000LL;
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} else if (acc < -0x800000000000LL) {
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acc = -0x800000000000LL;
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} else {
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acc &= 0xffffffff00000000LL;
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}
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env->acc = acc;
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}
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void helper_satr(CPURXState *env)
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{
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if (env->psw_o >> 31) {
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if ((int)env->psw_s < 0) {
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env->regs[6] = 0x00000000;
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env->regs[5] = 0x7fffffff;
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env->regs[4] = 0xffffffff;
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} else {
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env->regs[6] = 0xffffffff;
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env->regs[5] = 0x80000000;
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env->regs[4] = 0x00000000;
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}
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}
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}
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/* div */
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uint32_t helper_div(CPURXState *env, uint32_t num, uint32_t den)
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{
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uint32_t ret = num;
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if (!((num == INT_MIN && den == -1) || den == 0)) {
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ret = (int32_t)num / (int32_t)den;
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env->psw_o = 0;
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} else {
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env->psw_o = -1;
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}
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return ret;
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}
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uint32_t helper_divu(CPURXState *env, uint32_t num, uint32_t den)
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{
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uint32_t ret = num;
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if (den != 0) {
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ret = num / den;
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env->psw_o = 0;
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} else {
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env->psw_o = -1;
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}
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return ret;
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}
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/* exception */
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static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
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uintptr_t retaddr)
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{
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CPUState *cs = env_cpu(env);
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cs->exception_index = index;
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cpu_loop_exit_restore(cs, retaddr);
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}
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void QEMU_NORETURN helper_raise_privilege_violation(CPURXState *env)
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{
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raise_exception(env, 20, GETPC());
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}
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void QEMU_NORETURN helper_raise_access_fault(CPURXState *env)
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{
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raise_exception(env, 21, GETPC());
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}
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void QEMU_NORETURN helper_raise_illegal_instruction(CPURXState *env)
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{
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raise_exception(env, 23, GETPC());
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}
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void QEMU_NORETURN helper_wait(CPURXState *env)
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{
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CPUState *cs = env_cpu(env);
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cs->halted = 1;
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env->in_sleep = 1;
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raise_exception(env, EXCP_HLT, 0);
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}
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void QEMU_NORETURN helper_rxint(CPURXState *env, uint32_t vec)
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{
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raise_exception(env, 0x100 + vec, 0);
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}
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void QEMU_NORETURN helper_rxbrk(CPURXState *env)
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{
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raise_exception(env, 0x100, 0);
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}
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