155 lines
3.6 KiB
Python
155 lines
3.6 KiB
Python
# -*- Mode: Python -*-
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# vim: filetype=python
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##
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# = CXL devices
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##
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##
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# @CxlUncorErrorType:
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#
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# Type of uncorrectable CXL error to inject. These errors are
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# reported via an AER uncorrectable internal error with additional
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# information logged at the CXL device.
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#
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# @cache-data-parity: Data error such as data parity or data ECC error
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# CXL.cache
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#
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# @cache-address-parity: Address parity or other errors associated
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# with the address field on CXL.cache
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#
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# @cache-be-parity: Byte enable parity or other byte enable errors on
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# CXL.cache
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#
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# @cache-data-ecc: ECC error on CXL.cache
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#
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# @mem-data-parity: Data error such as data parity or data ECC error
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# on CXL.mem
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#
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# @mem-address-parity: Address parity or other errors associated with
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# the address field on CXL.mem
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#
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# @mem-be-parity: Byte enable parity or other byte enable errors on
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# CXL.mem.
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#
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# @mem-data-ecc: Data ECC error on CXL.mem.
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#
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# @reinit-threshold: REINIT threshold hit.
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#
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# @rsvd-encoding: Received unrecognized encoding.
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#
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# @poison-received: Received poison from the peer.
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#
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# @receiver-overflow: Buffer overflows (first 3 bits of header log
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# indicate which)
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#
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# @internal: Component specific error
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#
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# @cxl-ide-tx: Integrity and data encryption tx error.
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#
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# @cxl-ide-rx: Integrity and data encryption rx error.
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#
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# Since: 8.0
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##
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{ 'enum': 'CxlUncorErrorType',
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'data': ['cache-data-parity',
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'cache-address-parity',
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'cache-be-parity',
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'cache-data-ecc',
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'mem-data-parity',
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'mem-address-parity',
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'mem-be-parity',
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'mem-data-ecc',
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'reinit-threshold',
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'rsvd-encoding',
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'poison-received',
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'receiver-overflow',
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'internal',
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'cxl-ide-tx',
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'cxl-ide-rx'
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]
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}
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##
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# @CXLUncorErrorRecord:
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#
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# Record of a single error including header log.
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#
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# @type: Type of error
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#
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# @header: 16 DWORD of header.
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#
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# Since: 8.0
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##
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{ 'struct': 'CXLUncorErrorRecord',
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'data': {
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'type': 'CxlUncorErrorType',
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'header': [ 'uint32' ]
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}
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}
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##
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# @cxl-inject-uncorrectable-errors:
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#
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# Command to allow injection of multiple errors in one go. This
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# allows testing of multiple header log handling in the OS.
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#
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# @path: CXL Type 3 device canonical QOM path
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#
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# @errors: Errors to inject
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#
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# Since: 8.0
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##
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{ 'command': 'cxl-inject-uncorrectable-errors',
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'data': { 'path': 'str',
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'errors': [ 'CXLUncorErrorRecord' ] }}
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##
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# @CxlCorErrorType:
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#
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# Type of CXL correctable error to inject
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#
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# @cache-data-ecc: Data ECC error on CXL.cache
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#
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# @mem-data-ecc: Data ECC error on CXL.mem
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#
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# @crc-threshold: Component specific and applicable to 68 byte Flit
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# mode only.
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#
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# @cache-poison-received: Received poison from a peer on CXL.cache.
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#
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# @mem-poison-received: Received poison from a peer on CXL.mem
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#
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# @physical: Received error indication from the physical layer.
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#
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# Since: 8.0
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##
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{ 'enum': 'CxlCorErrorType',
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'data': ['cache-data-ecc',
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'mem-data-ecc',
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'crc-threshold',
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'retry-threshold',
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'cache-poison-received',
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'mem-poison-received',
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'physical']
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}
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##
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# @cxl-inject-correctable-error:
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#
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# Command to inject a single correctable error. Multiple error
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# injection of this error type is not interesting as there is no
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# associated header log. These errors are reported via AER as a
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# correctable internal error, with additional detail available from
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# the CXL device.
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#
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# @path: CXL Type 3 device canonical QOM path
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#
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# @type: Type of error.
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#
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# Since: 8.0
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##
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{'command': 'cxl-inject-correctable-error',
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'data': {'path': 'str', 'type': 'CxlCorErrorType'}}
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