f090c9d4ad
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
1076 lines
21 KiB
C
1076 lines
21 KiB
C
/*
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* m68k micro operations
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*
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* Copyright (c) 2006-2007 CodeSourcery
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h"
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#include "m68k-qreg.h"
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#ifndef offsetof
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#define offsetof(type, field) ((size_t) &((type *)0)->field)
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#endif
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static long qreg_offsets[] = {
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#define DEFO32(name, offset) offsetof(CPUState, offset),
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#define DEFR(name, reg, mode) -1,
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#define DEFF64(name, offset) offsetof(CPUState, offset),
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0,
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#include "qregs.def"
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};
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#define CPU_FP_STATUS env->fp_status
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#define RAISE_EXCEPTION(n) do { \
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env->exception_index = n; \
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cpu_loop_exit(); \
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} while(0)
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#define get_op helper_get_op
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#define set_op helper_set_op
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#define get_opf64 helper_get_opf64
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#define set_opf64 helper_set_opf64
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uint32_t
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get_op(int qreg)
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{
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if (qreg >= TARGET_NUM_QREGS) {
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return env->qregs[qreg - TARGET_NUM_QREGS];
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} else if (qreg == QREG_T0) {
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return T0;
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} else {
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return *(uint32_t *)(((long)env) + qreg_offsets[qreg]);
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}
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}
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void set_op(int qreg, uint32_t val)
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{
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if (qreg >= TARGET_NUM_QREGS) {
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env->qregs[qreg - TARGET_NUM_QREGS] = val;
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} else if (qreg == QREG_T0) {
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T0 = val;
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} else {
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*(uint32_t *)(((long)env) + qreg_offsets[qreg]) = val;
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}
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}
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float64 get_opf64(int qreg)
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{
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if (qreg < TARGET_NUM_QREGS) {
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return *(float64 *)(((long)env) + qreg_offsets[qreg]);
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} else {
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return *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS];
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}
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}
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void set_opf64(int qreg, float64 val)
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{
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if (qreg < TARGET_NUM_QREGS) {
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*(float64 *)(((long)env) + qreg_offsets[qreg]) = val;
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} else {
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*(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS] = val;
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}
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}
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#define OP(name) void OPPROTO glue(op_,name) (void)
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OP(mov32)
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{
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set_op(PARAM1, get_op(PARAM2));
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FORCE_RET();
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}
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OP(mov32_im)
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{
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set_op(PARAM1, PARAM2);
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FORCE_RET();
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}
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OP(movf64)
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{
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set_opf64(PARAM1, get_opf64(PARAM2));
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FORCE_RET();
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}
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OP(zerof64)
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{
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set_opf64(PARAM1, float64_zero);
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FORCE_RET();
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}
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OP(add32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 + op3);
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FORCE_RET();
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}
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OP(sub32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 - op3);
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FORCE_RET();
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}
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OP(mul32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 * op3);
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FORCE_RET();
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}
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OP(not32)
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{
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uint32_t arg = get_op(PARAM2);
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set_op(PARAM1, ~arg);
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FORCE_RET();
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}
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OP(neg32)
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{
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uint32_t arg = get_op(PARAM2);
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set_op(PARAM1, -arg);
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FORCE_RET();
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}
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OP(bswap32)
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{
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uint32_t arg = get_op(PARAM2);
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arg = (arg >> 24) | (arg << 24)
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| ((arg >> 16) & 0xff00) | ((arg << 16) & 0xff0000);
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set_op(PARAM1, arg);
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FORCE_RET();
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}
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OP(btest)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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if (op1 & op2)
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env->cc_dest &= ~CCF_Z;
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else
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env->cc_dest |= CCF_Z;
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FORCE_RET();
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}
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OP(ff1)
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{
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uint32_t arg = get_op(PARAM2);
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int n;
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for (n = 32; arg; n--)
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arg >>= 1;
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set_op(PARAM1, n);
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FORCE_RET();
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}
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OP(subx_cc)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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uint32_t res;
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if (env->cc_x) {
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env->cc_x = (op1 <= op2);
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env->cc_op = CC_OP_SUBX;
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res = op1 - (op2 + 1);
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} else {
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env->cc_x = (op1 < op2);
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env->cc_op = CC_OP_SUB;
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res = op1 - op2;
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}
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set_op(PARAM1, res);
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FORCE_RET();
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}
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OP(addx_cc)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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uint32_t res;
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if (env->cc_x) {
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res = op1 + op2 + 1;
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env->cc_x = (res <= op2);
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env->cc_op = CC_OP_ADDX;
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} else {
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res = op1 + op2;
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env->cc_x = (res < op2);
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env->cc_op = CC_OP_ADD;
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}
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set_op(PARAM1, res);
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FORCE_RET();
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}
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/* Logic ops. */
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OP(and32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 & op3);
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FORCE_RET();
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}
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OP(or32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 | op3);
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FORCE_RET();
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}
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OP(xor32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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set_op(PARAM1, op2 ^ op3);
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FORCE_RET();
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}
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/* Shifts. */
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OP(shl32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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uint32_t result;
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result = op2 << op3;
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set_op(PARAM1, result);
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FORCE_RET();
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}
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OP(shl_cc)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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uint32_t result;
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result = op1 << op2;
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set_op(PARAM1, result);
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env->cc_x = (op1 << (op2 - 1)) & 1;
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FORCE_RET();
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}
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OP(shr32)
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{
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uint32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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uint32_t result;
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result = op2 >> op3;
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set_op(PARAM1, result);
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FORCE_RET();
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}
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OP(shr_cc)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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uint32_t result;
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result = op1 >> op2;
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set_op(PARAM1, result);
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env->cc_x = (op1 >> (op2 - 1)) & 1;
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FORCE_RET();
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}
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OP(sar32)
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{
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int32_t op2 = get_op(PARAM2);
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uint32_t op3 = get_op(PARAM3);
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uint32_t result;
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result = op2 >> op3;
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set_op(PARAM1, result);
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FORCE_RET();
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}
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OP(sar_cc)
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{
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int32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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uint32_t result;
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result = op1 >> op2;
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set_op(PARAM1, result);
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env->cc_x = (op1 >> (op2 - 1)) & 1;
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FORCE_RET();
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}
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/* Value extend. */
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OP(ext8u32)
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{
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uint32_t op2 = get_op(PARAM2);
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set_op(PARAM1, (uint8_t)op2);
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FORCE_RET();
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}
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OP(ext8s32)
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{
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uint32_t op2 = get_op(PARAM2);
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set_op(PARAM1, (int8_t)op2);
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FORCE_RET();
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}
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OP(ext16u32)
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{
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uint32_t op2 = get_op(PARAM2);
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set_op(PARAM1, (uint16_t)op2);
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FORCE_RET();
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}
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OP(ext16s32)
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{
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uint32_t op2 = get_op(PARAM2);
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set_op(PARAM1, (int16_t)op2);
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FORCE_RET();
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}
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OP(flush_flags)
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{
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cpu_m68k_flush_flags(env, env->cc_op);
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FORCE_RET();
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}
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OP(divu)
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{
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uint32_t num;
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uint32_t den;
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uint32_t quot;
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uint32_t rem;
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uint32_t flags;
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num = env->div1;
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den = env->div2;
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/* ??? This needs to make sure the throwing location is accurate. */
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if (den == 0)
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RAISE_EXCEPTION(EXCP_DIV0);
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quot = num / den;
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rem = num % den;
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flags = 0;
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/* Avoid using a PARAM1 of zero. This breaks dyngen because it uses
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the address of a symbol, and gcc knows symbols can't have address
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zero. */
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if (PARAM1 == 2 && quot > 0xffff)
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flags |= CCF_V;
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if (quot == 0)
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flags |= CCF_Z;
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else if ((int32_t)quot < 0)
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flags |= CCF_N;
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env->div1 = quot;
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env->div2 = rem;
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env->cc_dest = flags;
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FORCE_RET();
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}
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OP(divs)
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{
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int32_t num;
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int32_t den;
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int32_t quot;
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int32_t rem;
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int32_t flags;
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num = env->div1;
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den = env->div2;
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if (den == 0)
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RAISE_EXCEPTION(EXCP_DIV0);
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quot = num / den;
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rem = num % den;
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flags = 0;
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if (PARAM1 == 2 && quot != (int16_t)quot)
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flags |= CCF_V;
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if (quot == 0)
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flags |= CCF_Z;
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else if (quot < 0)
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flags |= CCF_N;
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env->div1 = quot;
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env->div2 = rem;
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env->cc_dest = flags;
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FORCE_RET();
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}
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/* Halt is special because it may be a semihosting call. */
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OP(halt)
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{
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RAISE_EXCEPTION(EXCP_HALT_INSN);
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FORCE_RET();
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}
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OP(stop)
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{
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env->halted = 1;
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RAISE_EXCEPTION(EXCP_HLT);
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FORCE_RET();
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}
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OP(raise_exception)
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{
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RAISE_EXCEPTION(PARAM1);
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FORCE_RET();
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}
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/* Floating point comparison sets flags differently to other instructions. */
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OP(sub_cmpf64)
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{
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float64 src0;
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float64 src1;
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src0 = get_opf64(PARAM2);
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src1 = get_opf64(PARAM3);
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set_opf64(PARAM1, helper_sub_cmpf64(env, src0, src1));
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FORCE_RET();
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}
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OP(update_xflag_tst)
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{
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uint32_t op1 = get_op(PARAM1);
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env->cc_x = op1;
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FORCE_RET();
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}
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OP(update_xflag_lt)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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env->cc_x = (op1 < op2);
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FORCE_RET();
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}
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OP(get_xflag)
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{
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set_op(PARAM1, env->cc_x);
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FORCE_RET();
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}
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OP(logic_cc)
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{
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uint32_t op1 = get_op(PARAM1);
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env->cc_dest = op1;
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FORCE_RET();
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}
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OP(update_cc_add)
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{
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uint32_t op1 = get_op(PARAM1);
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uint32_t op2 = get_op(PARAM2);
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env->cc_dest = op1;
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env->cc_src = op2;
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FORCE_RET();
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}
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OP(fp_result)
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{
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env->fp_result = get_opf64(PARAM1);
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FORCE_RET();
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}
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OP(set_sr)
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{
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env->sr = get_op(PARAM1) & 0xffff;
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m68k_switch_sp(env);
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FORCE_RET();
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}
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OP(jmp)
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{
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GOTO_LABEL_PARAM(1);
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}
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OP(set_T0_z32)
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{
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uint32_t arg = get_op(PARAM1);
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T0 = (arg == 0);
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FORCE_RET();
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}
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OP(set_T0_nz32)
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{
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uint32_t arg = get_op(PARAM1);
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T0 = (arg != 0);
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FORCE_RET();
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}
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OP(set_T0_s32)
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{
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int32_t arg = get_op(PARAM1);
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T0 = (arg > 0);
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FORCE_RET();
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}
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OP(set_T0_ns32)
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{
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int32_t arg = get_op(PARAM1);
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T0 = (arg >= 0);
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FORCE_RET();
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}
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OP(jmp_T0)
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{
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if (T0)
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GOTO_LABEL_PARAM(1);
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FORCE_RET();
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}
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void OPPROTO op_goto_tb0(void)
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{
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GOTO_TB(op_goto_tb0, PARAM1, 0);
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}
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void OPPROTO op_goto_tb1(void)
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{
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GOTO_TB(op_goto_tb1, PARAM1, 1);
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}
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OP(exit_tb)
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{
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EXIT_TB();
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}
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/* Floating point. */
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OP(f64_to_i32)
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{
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set_op(PARAM1, float64_to_int32(get_opf64(PARAM2), &CPU_FP_STATUS));
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FORCE_RET();
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}
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OP(f64_to_f32)
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{
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union {
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float32 f;
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uint32_t i;
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} u;
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u.f = float64_to_float32(get_opf64(PARAM2), &CPU_FP_STATUS);
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set_op(PARAM1, u.i);
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FORCE_RET();
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}
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OP(i32_to_f64)
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{
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set_opf64(PARAM1, int32_to_float64(get_op(PARAM2), &CPU_FP_STATUS));
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FORCE_RET();
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}
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OP(f32_to_f64)
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{
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union {
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float32 f;
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|
uint32_t i;
|
|
} u;
|
|
u.i = get_op(PARAM2);
|
|
set_opf64(PARAM1, float32_to_float64(u.f, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(absf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
set_opf64(PARAM1, float64_abs(op0));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(chsf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
set_opf64(PARAM1, float64_chs(op0));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(sqrtf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
set_opf64(PARAM1, float64_sqrt(op0, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(addf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
float64 op1 = get_opf64(PARAM3);
|
|
set_opf64(PARAM1, float64_add(op0, op1, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(subf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
float64 op1 = get_opf64(PARAM3);
|
|
set_opf64(PARAM1, float64_sub(op0, op1, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(mulf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
float64 op1 = get_opf64(PARAM3);
|
|
set_opf64(PARAM1, float64_mul(op0, op1, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(divf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
float64 op1 = get_opf64(PARAM3);
|
|
set_opf64(PARAM1, float64_div(op0, op1, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(iround_f64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
set_opf64(PARAM1, float64_round_to_int(op0, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(itrunc_f64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
set_opf64(PARAM1, float64_trunc_to_int(op0, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(compare_quietf64)
|
|
{
|
|
float64 op0 = get_opf64(PARAM2);
|
|
float64 op1 = get_opf64(PARAM3);
|
|
set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS));
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(movec)
|
|
{
|
|
int op1 = get_op(PARAM1);
|
|
uint32_t op2 = get_op(PARAM2);
|
|
helper_movec(env, op1, op2);
|
|
}
|
|
|
|
/* Memory access. */
|
|
|
|
#define MEMSUFFIX _raw
|
|
#include "op_mem.h"
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
#define MEMSUFFIX _user
|
|
#include "op_mem.h"
|
|
#define MEMSUFFIX _kernel
|
|
#include "op_mem.h"
|
|
#endif
|
|
|
|
/* MAC unit. */
|
|
/* TODO: The MAC instructions use 64-bit arithmetic fairly extensively.
|
|
This results in fairly large ops (and sometimes other issues) on 32-bit
|
|
hosts. Maybe move most of them into helpers. */
|
|
OP(macmuls)
|
|
{
|
|
uint32_t op1 = get_op(PARAM1);
|
|
uint32_t op2 = get_op(PARAM2);
|
|
int64_t product;
|
|
int64_t res;
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
res = (product << 24) >> 24;
|
|
if (res != product) {
|
|
env->macsr |= MACSR_V;
|
|
if (env->macsr & MACSR_OMC) {
|
|
/* Make sure the accumulate operation overflows. */
|
|
if (product < 0)
|
|
res = ~(1ll << 50);
|
|
else
|
|
res = 1ll << 50;
|
|
}
|
|
}
|
|
env->mactmp = res;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macmulu)
|
|
{
|
|
uint32_t op1 = get_op(PARAM1);
|
|
uint32_t op2 = get_op(PARAM2);
|
|
uint64_t product;
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
if (product & (0xffffffull << 40)) {
|
|
env->macsr |= MACSR_V;
|
|
if (env->macsr & MACSR_OMC) {
|
|
/* Make sure the accumulate operation overflows. */
|
|
product = 1ll << 50;
|
|
} else {
|
|
product &= ((1ull << 40) - 1);
|
|
}
|
|
}
|
|
env->mactmp = product;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macmulf)
|
|
{
|
|
int32_t op1 = get_op(PARAM1);
|
|
int32_t op2 = get_op(PARAM2);
|
|
uint64_t product;
|
|
uint32_t remainder;
|
|
|
|
product = (uint64_t)op1 * op2;
|
|
if (env->macsr & MACSR_RT) {
|
|
remainder = product & 0xffffff;
|
|
product >>= 24;
|
|
if (remainder > 0x800000)
|
|
product++;
|
|
else if (remainder == 0x800000)
|
|
product += (product & 1);
|
|
} else {
|
|
product >>= 24;
|
|
}
|
|
env->mactmp = product;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macshl)
|
|
{
|
|
env->mactmp <<= 1;
|
|
}
|
|
|
|
OP(macshr)
|
|
{
|
|
env->mactmp >>= 1;
|
|
}
|
|
|
|
OP(macadd)
|
|
{
|
|
int acc = PARAM1;
|
|
env->macc[acc] += env->mactmp;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macsub)
|
|
{
|
|
int acc = PARAM1;
|
|
env->macc[acc] -= env->mactmp;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macsats)
|
|
{
|
|
int acc = PARAM1;
|
|
int64_t sum;
|
|
int64_t result;
|
|
|
|
sum = env->macc[acc];
|
|
result = (sum << 16) >> 16;
|
|
if (result != sum) {
|
|
env->macsr |= MACSR_V;
|
|
}
|
|
if (env->macsr & MACSR_V) {
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
if (env->macsr & MACSR_OMC) {
|
|
/* The result is saturated to 32 bits, despite overflow occuring
|
|
at 48 bits. Seems weird, but that's what the hardware docs
|
|
say. */
|
|
result = (result >> 63) ^ 0x7fffffff;
|
|
}
|
|
}
|
|
env->macc[acc] = result;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macsatu)
|
|
{
|
|
int acc = PARAM1;
|
|
uint64_t sum;
|
|
|
|
sum = env->macc[acc];
|
|
if (sum & (0xffffull << 48)) {
|
|
env->macsr |= MACSR_V;
|
|
}
|
|
if (env->macsr & MACSR_V) {
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
if (env->macsr & MACSR_OMC) {
|
|
if (sum > (1ull << 53))
|
|
sum = 0;
|
|
else
|
|
sum = (1ull << 48) - 1;
|
|
} else {
|
|
sum &= ((1ull << 48) - 1);
|
|
}
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(macsatf)
|
|
{
|
|
int acc = PARAM1;
|
|
int64_t sum;
|
|
int64_t result;
|
|
|
|
sum = env->macc[acc];
|
|
result = (sum << 16) >> 16;
|
|
if (result != sum) {
|
|
env->macsr |= MACSR_V;
|
|
}
|
|
if (env->macsr & MACSR_V) {
|
|
env->macsr |= MACSR_PAV0 << acc;
|
|
if (env->macsr & MACSR_OMC) {
|
|
result = (result >> 63) ^ 0x7fffffffffffll;
|
|
}
|
|
}
|
|
env->macc[acc] = result;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(mac_clear_flags)
|
|
{
|
|
env->macsr &= ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV);
|
|
}
|
|
|
|
OP(mac_set_flags)
|
|
{
|
|
int acc = PARAM1;
|
|
uint64_t val;
|
|
val = env->macc[acc];
|
|
if (val == 0)
|
|
env->macsr |= MACSR_Z;
|
|
else if (val & (1ull << 47));
|
|
env->macsr |= MACSR_N;
|
|
if (env->macsr & (MACSR_PAV0 << acc)) {
|
|
env->macsr |= MACSR_V;
|
|
}
|
|
if (env->macsr & MACSR_FI) {
|
|
val = ((int64_t)val) >> 40;
|
|
if (val != 0 && val != -1)
|
|
env->macsr |= MACSR_EV;
|
|
} else if (env->macsr & MACSR_SU) {
|
|
val = ((int64_t)val) >> 32;
|
|
if (val != 0 && val != -1)
|
|
env->macsr |= MACSR_EV;
|
|
} else {
|
|
if ((val >> 32) != 0)
|
|
env->macsr |= MACSR_EV;
|
|
}
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_macf)
|
|
{
|
|
int acc = PARAM2;
|
|
int64_t val;
|
|
int rem;
|
|
uint32_t result;
|
|
|
|
val = env->macc[acc];
|
|
if (env->macsr & MACSR_SU) {
|
|
/* 16-bit rounding. */
|
|
rem = val & 0xffffff;
|
|
val = (val >> 24) & 0xffffu;
|
|
if (rem > 0x800000)
|
|
val++;
|
|
else if (rem == 0x800000)
|
|
val += (val & 1);
|
|
} else if (env->macsr & MACSR_RT) {
|
|
/* 32-bit rounding. */
|
|
rem = val & 0xff;
|
|
val >>= 8;
|
|
if (rem > 0x80)
|
|
val++;
|
|
else if (rem == 0x80)
|
|
val += (val & 1);
|
|
} else {
|
|
/* No rounding. */
|
|
val >>= 8;
|
|
}
|
|
if (env->macsr & MACSR_OMC) {
|
|
/* Saturate. */
|
|
if (env->macsr & MACSR_SU) {
|
|
if (val != (uint16_t) val) {
|
|
result = ((val >> 63) ^ 0x7fff) & 0xffff;
|
|
} else {
|
|
result = val & 0xffff;
|
|
}
|
|
} else {
|
|
if (val != (uint32_t)val) {
|
|
result = ((uint32_t)(val >> 63) & 0x7fffffff);
|
|
} else {
|
|
result = (uint32_t)val;
|
|
}
|
|
}
|
|
} else {
|
|
/* No saturation. */
|
|
if (env->macsr & MACSR_SU) {
|
|
result = val & 0xffff;
|
|
} else {
|
|
result = (uint32_t)val;
|
|
}
|
|
}
|
|
set_op(PARAM1, result);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_maci)
|
|
{
|
|
int acc = PARAM2;
|
|
set_op(PARAM1, (uint32_t)env->macc[acc]);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_macs)
|
|
{
|
|
int acc = PARAM2;
|
|
int64_t val = env->macc[acc];
|
|
uint32_t result;
|
|
if (val == (int32_t)val) {
|
|
result = (int32_t)val;
|
|
} else {
|
|
result = (val >> 61) ^ 0x7fffffff;
|
|
}
|
|
set_op(PARAM1, result);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_macu)
|
|
{
|
|
int acc = PARAM2;
|
|
uint64_t val = env->macc[acc];
|
|
uint32_t result;
|
|
if ((val >> 32) == 0) {
|
|
result = (uint32_t)val;
|
|
} else {
|
|
result = 0xffffffffu;
|
|
}
|
|
set_op(PARAM1, result);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(clear_mac)
|
|
{
|
|
int acc = PARAM1;
|
|
|
|
env->macc[acc] = 0;
|
|
env->macsr &= ~(MACSR_PAV0 << acc);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(move_mac)
|
|
{
|
|
int dest = PARAM1;
|
|
int src = PARAM2;
|
|
uint32_t mask;
|
|
env->macc[dest] = env->macc[src];
|
|
mask = MACSR_PAV0 << dest;
|
|
if (env->macsr & (MACSR_PAV0 << src))
|
|
env->macsr |= mask;
|
|
else
|
|
env->macsr &= ~mask;
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_mac_extf)
|
|
{
|
|
uint32_t val;
|
|
int acc = PARAM2;
|
|
val = env->macc[acc] & 0x00ff;
|
|
val = (env->macc[acc] >> 32) & 0xff00;
|
|
val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
|
|
val |= (env->macc[acc + 1] >> 16) & 0xff000000;
|
|
set_op(PARAM1, val);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(get_mac_exti)
|
|
{
|
|
uint32_t val;
|
|
int acc = PARAM2;
|
|
val = (env->macc[acc] >> 32) & 0xffff;
|
|
val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
|
|
set_op(PARAM1, val);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(set_macf)
|
|
{
|
|
int acc = PARAM2;
|
|
int32_t val = get_op(PARAM1);
|
|
env->macc[acc] = ((int64_t)val) << 8;
|
|
env->macsr &= ~(MACSR_PAV0 << acc);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(set_macs)
|
|
{
|
|
int acc = PARAM2;
|
|
int32_t val = get_op(PARAM1);
|
|
env->macc[acc] = val;
|
|
env->macsr &= ~(MACSR_PAV0 << acc);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(set_macu)
|
|
{
|
|
int acc = PARAM2;
|
|
uint32_t val = get_op(PARAM1);
|
|
env->macc[acc] = val;
|
|
env->macsr &= ~(MACSR_PAV0 << acc);
|
|
FORCE_RET();
|
|
}
|
|
|
|
OP(set_mac_extf)
|
|
{
|
|
int acc = PARAM2;
|
|
int32_t val = get_op(PARAM1);
|
|
int64_t res;
|
|
int32_t tmp;
|
|
res = env->macc[acc] & 0xffffffff00ull;
|
|
tmp = (int16_t)(val & 0xff00);
|
|
res |= ((int64_t)tmp) << 32;
|
|
res |= val & 0xff;
|
|
env->macc[acc] = res;
|
|
res = env->macc[acc + 1] & 0xffffffff00ull;
|
|
tmp = (val & 0xff000000);
|
|
res |= ((int64_t)tmp) << 16;
|
|
res |= (val >> 16) & 0xff;
|
|
env->macc[acc + 1] = res;
|
|
}
|
|
|
|
OP(set_mac_exts)
|
|
{
|
|
int acc = PARAM2;
|
|
int32_t val = get_op(PARAM1);
|
|
int64_t res;
|
|
int32_t tmp;
|
|
res = (uint32_t)env->macc[acc];
|
|
tmp = (int16_t)val;
|
|
res |= ((int64_t)tmp) << 32;
|
|
env->macc[acc] = res;
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
tmp = val & 0xffff0000;
|
|
res |= (int64_t)tmp << 16;
|
|
env->macc[acc + 1] = res;
|
|
}
|
|
|
|
OP(set_mac_extu)
|
|
{
|
|
int acc = PARAM2;
|
|
int32_t val = get_op(PARAM1);
|
|
uint64_t res;
|
|
res = (uint32_t)env->macc[acc];
|
|
res |= ((uint64_t)(val & 0xffff)) << 32;
|
|
env->macc[acc] = res;
|
|
res = (uint32_t)env->macc[acc + 1];
|
|
res |= (uint64_t)(val & 0xffff0000) << 16;
|
|
env->macc[acc + 1] = res;
|
|
}
|
|
|
|
OP(set_macsr)
|
|
{
|
|
m68k_set_macsr(env, get_op(PARAM1));
|
|
}
|