3da0ab3529
This patch adds support for PER Breaking-Event-Address register. Like real hardware, it save the current PSW address when the PSW address is changed by an instruction. We have to take care of optimizations QEMU does, a branch to the next instruction is still a branch. This register is copied to low core memory when a program exception happens. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de> |
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arch_dump.c | ||
cc_helper.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
fpu_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
insn-data.def | ||
insn-format.def | ||
int_helper.c | ||
interrupt.c | ||
ioinst.c | ||
ioinst.h | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
mem_helper.c | ||
misc_helper.c | ||
mmu_helper.c | ||
translate.c |