Peter Maydell b22af022b2 target-arm: Remove c0_cachetype CPUARMState field ... Remove the no-longer-used CPUARMState c0_cachetype field. Although this was a constant register we had it in our migration state. Drop this (with resulting version bump) because for ARM currently we prefer cleaner migration code and have not stabilised migration format yet. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2012-06-20 12:11:49 +00:00
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arm-semi.c	build: move obj-TARGET-y variables to nested Makefile.objs	2012-06-07 07:17:36 +02:00
cpu-qom.h	target-arm: Convert cp15 crn=1 registers	2012-06-20 12:08:22 +00:00
cpu.c	target-arm: Convert final ID registers	2012-06-20 12:11:45 +00:00
cpu.h	target-arm: Remove c0_cachetype CPUARMState field	2012-06-20 12:11:49 +00:00
helper.c	target-arm: Convert final ID registers	2012-06-20 12:11:45 +00:00
helper.h	target-arm: Convert TEECR, TEEHBR to new scheme	2012-06-20 12:04:08 +00:00
iwmmxt_helper.c
machine.c	target-arm: Remove c0_cachetype CPUARMState field	2012-06-20 12:11:49 +00:00
Makefile.objs	build: move other target-*/ objects to nested Makefile.objs	2012-06-07 09:21:11 +02:00
neon_helper.c	target-arm: When setting FPSCR.QC, don't clear other FPSCR bits	2012-05-10 12:56:08 +00:00
op_addsub.h
op_helper.c	target-arm: initial coprocessor register framework	2012-06-20 12:01:02 +00:00
translate.c	target-arm: Convert performance monitor registers	2012-06-20 12:05:17 +00:00