34ef767609
Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
30 lines
749 B
C
30 lines
749 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define S390 target-specific operand constraints.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* Define constraint letters for register sets:
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* REGS(letter, register_mask)
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*/
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REGS('r', ALL_GENERAL_REGS)
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REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
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REGS('v', ALL_VECTOR_REGS)
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/*
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* A (single) even/odd pair for division.
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* TODO: Add something to the register allocator to allow
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* this kind of regno+1 pairing to be done more generally.
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*/
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REGS('a', 1u << TCG_REG_R2)
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REGS('b', 1u << TCG_REG_R3)
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/*
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* Define constraint letters for constants:
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* CONST(letter, TCG_CT_CONST_* bit set)
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*/
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CONST('A', TCG_CT_CONST_S33)
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CONST('I', TCG_CT_CONST_S16)
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CONST('J', TCG_CT_CONST_S32)
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CONST('Z', TCG_CT_CONST_ZERO)
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