Peter Maydell 3474c98a2a accel/tcg: Assert that tlb fill gave us a valid TLB entry ... In commit 4b1a3e1e34 we added a check for whether the TLB entry we had following a tlb_fill had the INVALID bit set. This could happen in some circumstances because a stale or wrong TLB entry was pulled out of the victim cache. However, after commit 68fea03855 (which prevents stale entries being in the victim cache) and the previous commit (which ensures we don't incorrectly hit in the victim cache)) this should never be possible. Drop the check on TLB_INVALID_MASK from the "is this a TLB_RECHECK?" condition, and instead assert that the tlb fill procedure has given us a valid TLB entry (or longjumped out with a guest exception). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180713141636.18665-3-peter.maydell@linaro.org		2018-07-16 17:26:01 +01:00
..
atomic_template.h	trace: enable tracing of TCG atomics	2018-06-27 11:09:24 +01:00
cpu-exec-common.c	icount: fix cpu_restore_state_from_tb for non-tb-exit cases	2018-04-11 09:05:22 +10:00
cpu-exec.c	tcg: remove tb_lock	2018-06-15 08:18:48 -10:00
cputlb.c	accel/tcg: Assert that tlb fill gave us a valid TLB entry	2018-07-16 17:26:01 +01:00
Makefile.objs
softmmu_template.h	tcg: Define and use new tlb_hit() and tlb_hit_page() functions	2018-07-02 08:02:20 -07:00
tcg-all.c
tcg-runtime-gvec.c
tcg-runtime.c
tcg-runtime.h	tcg: Introduce atomic helpers for integer min/max	2018-05-10 18:10:57 +01:00
trace-events
translate-all.c	translate-all: honour CF_NOCACHE in tb_gen_code	2018-07-09 16:14:36 +01:00
translate-all.h	move public invalidate APIs out of translate-all.{c,h}, clean up	2018-06-28 19:05:30 +02:00
translator.c	translator: merge max_insns into DisasContextBase	2018-05-09 10:12:21 -07:00
user-exec-stub.c	i386/cpu: make -cpu host support monitor/mwait	2018-06-29 13:02:47 +02:00
user-exec.c	icount: fix cpu_restore_state_from_tb for non-tb-exit cases	2018-04-11 09:05:22 +10:00