qemu-e2k/hw/riscv
Alistair Francis b30422231b
hw/riscv: Add support for loading a firmware
Add support for loading a firmware file for the virt machine and the
SiFive U. This can be run with the following command:

    qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel vmlinux

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27 02:47:06 -07:00
..
boot.c hw/riscv: Add support for loading a firmware 2019-06-27 02:47:06 -07:00
Kconfig kconfig: add CONFIG_MSI_NONBROKEN 2019-03-18 09:39:57 +01:00
Makefile.objs hw/riscv: Split out the boot functions 2019-06-27 02:47:06 -07:00
riscv_hart.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
riscv_htif.c
sifive_clint.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_e.c hw/riscv: Split out the boot functions 2019-06-27 02:47:06 -07:00
sifive_gpio.c SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
sifive_plic.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_prci.c sifive_prci: Read and write PRCI registers 2019-06-23 23:44:41 -07:00
sifive_test.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_u.c hw/riscv: Add support for loading a firmware 2019-06-27 02:47:06 -07:00
sifive_uart.c riscv: sifive_uart: Generate TX interrupt 2019-03-19 05:18:28 -07:00
spike.c hw/riscv: Split out the boot functions 2019-06-27 02:47:06 -07:00
trace-events SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
virt.c hw/riscv: Add support for loading a firmware 2019-06-27 02:47:06 -07:00