Bin Meng c9711bd778 target/riscv: cpu: Enable native debug feature ... Turn on native debug feature by default for all CPUs. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220421003324.1134983-6-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2022-04-22 10:35:16 +10:00
..
insn_trans
arch_dump.c
bitmanip_helper.c
cpu_bits.h
cpu_helper.c	hw/intc: Make RISC-V ACLINT mtime MMIO register writable	2022-04-22 10:35:16 +10:00
cpu_user.h
cpu-param.h
cpu.c	target/riscv: cpu: Enable native debug feature	2022-04-22 10:35:16 +10:00
cpu.h	target/riscv: cpu: Add a config option for native debug	2022-04-22 10:35:16 +10:00
csr.c	target/riscv: csr: Hook debug CSR read/write	2022-04-22 10:35:16 +10:00
debug.c	target/riscv: csr: Hook debug CSR read/write	2022-04-22 10:35:16 +10:00
debug.h	target/riscv: csr: Hook debug CSR read/write	2022-04-22 10:35:16 +10:00
fpu_helper.c
gdbstub.c
helper.h
insn16.decode
insn32.decode
instmap.h
internals.h
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c
m128_helper.c
machine.c	target/riscv: machine: Add debug state description	2022-04-22 10:35:16 +10:00
meson.build
monitor.c
op_helper.c
pmp.c
pmp.h
sbi_ecall_interface.h
trace-events
trace.h
translate.c
vector_helper.c
XVentanaCondOps.decode