..
trans_privileged.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rva.c.inc
target/riscv: Ensure opcode is saved for all relevant instructions
2023-02-07 08:19:23 +10:00
trans_rvb.c.inc
target/riscv: Drop tcg_temp_free
2023-03-05 13:44:08 -08:00
trans_rvbf16.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvd.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvf.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvh.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvi.c.inc
target/riscv: rename ext_ifencei to ext_zifencei
2023-11-07 11:02:17 +10:00
trans_rvk.c.inc
target/riscv: Drop tcg_temp_free
2023-03-05 13:44:08 -08:00
trans_rvm.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvv.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvvk.c.inc
target/riscv: Replace Zvbb checking by Zvkb
2023-11-07 11:06:02 +10:00
trans_rvzawrs.c.inc
target/riscv: Change gen_set_pc_imm to gen_update_pc
2023-06-13 17:35:20 +10:00
trans_rvzce.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvzfa.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvzfh.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_rvzicbo.c.inc
target/riscv: rename ext_icboz to ext_zicboz
2023-11-07 11:02:17 +10:00
trans_rvzicond.c.inc
target/riscv: refactor Zicond support
2023-05-05 10:49:50 +10:00
trans_svinval.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_xthead.c.inc
tcg: Rename cpu_env to tcg_env
2023-10-03 08:01:02 -07:00
trans_xventanacondops.c.inc
target/riscv: redirect XVentanaCondOps to use the Zicond functions
2023-05-05 10:49:50 +10:00