Peter Maydell b53db42bc0 hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ ... Augment the GICv3's QOM device interface by adding two new sets of sysbus IRQ lines, to signal VIRQ and VFIQ to each CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-2-git-send-email-peter.maydell@linaro.org		2017-01-20 11:15:08 +00:00
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allwinner-a10-pic.h	Clean up header guards that don't match their file name	2016-07-12 16:19:16 +02:00
arm_gic_common.h
arm_gic.h	gic: provide defines for v2/v3 targetlist sizes	2016-07-14 16:51:37 +01:00
arm_gicv3_common.h	hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ	2017-01-20 11:15:08 +00:00
arm_gicv3_its_common.h	hw/intc/arm_gicv3_its: Implement ITS base class	2016-10-04 13:28:08 +01:00
arm_gicv3.h	hw/intc/arm_gicv3: ARM GICv3 device framework	2016-06-17 15:23:51 +01:00
aspeed_vic.h
bcm2835_ic.h
bcm2836_control.h
imx_avic.h
intc.h	intc: add an interface to gather statistics/informations on interrupt controllers	2016-10-04 10:00:25 +02:00
mips_gic.h	Clean up ill-advised or unusual header guards	2016-07-12 16:20:46 +02:00
realview_gic.h