Max Filippov b68755c142 target/xtensa: sim: instantiate local memories ... Xtensa core may have a number of RAM and ROM areas configured. Record their size and location from the core configuration overlay and instantiate them as RAM regions in the SIM machine. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2017-02-23 10:30:41 -08:00
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core-dc232b
core-dc233c
core-fsf
core-dc232b.c
core-dc233c.c
core-fsf.c
cpu-qom.h
cpu.c	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
cpu.h	target/xtensa: sim: instantiate local memories	2017-02-23 10:30:41 -08:00
gdbstub.c
helper.c	target/xtensa: implement RUNSTALL	2017-01-15 13:01:55 -08:00
helper.h	target/xtensa updates:	2017-01-25 16:36:57 +00:00
import_core.sh
Makefile.objs
monitor.c	monitor: Fix crashes when using HMP commands without CPU	2017-02-21 18:29:01 +00:00
op_helper.c	target/xtensa updates:	2017-01-25 16:36:57 +00:00
overlay_tool.h	target/xtensa: sim: instantiate local memories	2017-02-23 10:30:41 -08:00
translate.c	target/xtensa updates:	2017-01-25 16:36:57 +00:00
xtensa-semi.c