qemu-e2k/hw/core
Peter Maydell 22d30b340a MIPS patches queue
. Fix some comment spelling errors
 . Demacro some TCG helpers
 . Add loongson-ext lswc2/lsdc2 group of instructions
 . Log unimplemented cache opcode
 . Increase number of TLB entries on the 34Kf core
 . Allow the CPU to use dynamic frequencies
 . Calculate the CP0 timer period using the CPU frequency
 . Set CPU frequency for each machine
 . Fix Malta FPGA I/O region size
 . Allow running qtests when ROM is missing
 . Add record/replay acceptance tests
 . Update MIPS CPU documentation
 . MAINTAINERS updates
 
 CI jobs results:
   https://gitlab.com/philmd/qemu/-/pipelines/203931842
   https://travis-ci.org/github/philmd/qemu/builds/736491461
   https://cirrus-ci.com/build/6272264062631936
   https://app.shippable.com/github/philmd/qemu/runs/886/summary/console
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAl+K+NkACgkQ4+MsLN6t
 wN4oPRAArZ5v0fjGrylt9g4xCAygLoSMkH3sZxltB77UVN/dCawSTLK2seKKO5g/
 UtGt/j4/OAt8Ms+nF8FT+UZbknkgq+h7coOorHvz6gDEAx9UIg6/S2TRZJEx28+l
 LbzkqdxvNSoHRrQDpGo43xoaxjzCxSTSOKpPfje6p2YDxWjkxdr/ahcsbKHSKc+x
 uGdVdEAlLiAs/fBhkaJD3yy1VfqJKu8V5JJo1g4gSQOD1worRbZ4Us9QfuYr79Q7
 Kce1Z1MQSf/TceZuDubhzZBep5lF1uW4lTywcaDby0LvGNK4K+RnH+i+t7CNhtKs
 LH5j6iFQY1ecjb1Vh0IgKNAFaM2sTtO7A6fbBSOkVTO60wEp7i9fpbI5TRIjv7z/
 EBkzP3n00hhbFFDci6Lnh/Ko0Xy0ODe3Um5l410sTnJe9+LK0HR5V6WH8PD/wKV2
 nnKzSgb1U51KS6+FzLGLbQzDEvCgRKAJ9mwiQ+dlRfFHj+rEM6a9rlQmtsADBhKi
 sEx62BKe6mM/+qQL9AOwZ5xBmFAn6wquuLYoA2Bwfg0wPIiAiFTwrz/eVSm9qYsw
 O9Fer+1IMmd06T1REUtSDAh8+D2ekknKmFA3AG0818WvluD0Qm3KZp8uLLHJ/XkO
 jiRtmeW+hApeh8hP4E0bzmrfJPKseBCYYP1By7XavIOoCxlqhew=
 =BOxw
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20201017' into staging

MIPS patches queue

. Fix some comment spelling errors
. Demacro some TCG helpers
. Add loongson-ext lswc2/lsdc2 group of instructions
. Log unimplemented cache opcode
. Increase number of TLB entries on the 34Kf core
. Allow the CPU to use dynamic frequencies
. Calculate the CP0 timer period using the CPU frequency
. Set CPU frequency for each machine
. Fix Malta FPGA I/O region size
. Allow running qtests when ROM is missing
. Add record/replay acceptance tests
. Update MIPS CPU documentation
. MAINTAINERS updates

CI jobs results:
  https://gitlab.com/philmd/qemu/-/pipelines/203931842
  https://travis-ci.org/github/philmd/qemu/builds/736491461
  https://cirrus-ci.com/build/6272264062631936
  https://app.shippable.com/github/philmd/qemu/runs/886/summary/console

# gpg: Signature made Sat 17 Oct 2020 14:59:53 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/mips-next-20201017: (44 commits)
  target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)
  MAINTAINERS: Remove duplicated Malta test entries
  MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mail
  MAINTAINERS: Put myself forward for MIPS target
  MAINTAINERS: Remove myself
  docs/system: Update MIPS CPU documentation
  tests/acceptance: Add MIPS record/replay tests
  hw/mips: Remove exit(1) in case of missing ROM
  hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON
  hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE)
  hw/mips: Simplify loading 64-bit ELF kernels
  hw/mips/malta: Use clearer qdev style
  hw/mips/malta: Move gt64120 related code together
  hw/mips/malta: Fix FPGA I/O region size
  target/mips/cpu: Display warning when CPU is used without input clock
  hw/mips/cps: Do not allow use without input clock
  hw/mips/malta: Set CPU frequency to 320 MHz
  hw/mips/boston: Set CPU frequency to 1 GHz
  hw/mips/cps: Expose input clock and connect it to CPU cores
  hw/mips/jazz: Correct CPU frequencies
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-19 10:52:57 +01:00
..
bus.c device-core: use RCU for list of children of a bus 2020-10-12 11:50:50 -04:00
clock-vmstate.c
clock.c hw/core/clock: Add the clock_new helper function 2020-10-16 18:58:10 +02:00
cpu.c machine + QOM queue, 2020-10-06 2020-10-08 11:32:54 +01:00
fw-path-provider.c
generic-loader.c
hotplug.c
irq.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
Kconfig
loader-fit.c
loader.c
machine-hmp-cmds.c monitor: Add Monitor parameter to monitor_get_cpu_index() 2020-10-09 07:08:19 +02:00
machine-qmp-cmds.c cphp: remove deprecated cpu-add command(s) 2020-09-29 02:14:30 -04:00
machine.c cpu: Introduce CPU model deprecation API 2020-10-14 15:28:54 -04:00
meson.build hw/core: Move the creation of the library to the main meson.build 2020-10-12 11:50:19 -04:00
nmi.c
null-machine.c
numa.c numa: hmat: require parent cache description before the next level one 2020-10-06 11:09:41 -04:00
or-irq.c
platform-bus.c
ptimer.c cpu-timers, icount: new modules 2020-10-05 16:41:22 +02:00
qdev-clock.c hw/qdev-clock: Display error hint when clock is missing from device 2020-10-16 18:58:10 +02:00
qdev-fw.c
qdev-prop-internal.h hw/core/qdev-properties: Export some integer-related functions 2020-10-06 11:09:35 -04:00
qdev-properties-system.c hw/core/qdev-properties: Extract system-mode specific properties 2020-10-06 11:09:35 -04:00
qdev-properties.c hw/core/qdev-properties: Extract system-mode specific properties 2020-10-06 11:09:35 -04:00
qdev.c device-core: use atomic_set on .realized property 2020-10-12 11:50:51 -04:00
register.c core/register: Specify instance_size in the TypeInfo 2020-09-25 16:52:24 -07:00
reset.c
resettable.c
split-irq.c
stream.c
sysbus.c qom: simplify object_find_property / object_class_find_property 2020-09-22 16:45:16 -04:00
trace-events
trace.h
uboot_image.h
vm-change-state-handler.c
vmstate-if.c