OpenE2K/qemu-e2k
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qemu-e2k/include/hw/arm
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Francisco Iglesias acc0b8b05a hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers 
Connect ZynqMP's USB controllers.

Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220920081517.25401-1-frasse.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29 17:40:01 +01:00
..
allwinner-a10.h
allwinner-h3.h arm: Consistently use "Cortex-Axx", not "Cortex Axx" 2021-06-03 16:43:25 +01:00
armsse-version.h hw/arm/armsse: Introduce SSE subsystem version property 2021-03-08 17:20:01 +00:00
armsse.h hw/arm: Model TCMs in the SSE-300, not the AN547 2021-05-25 16:01:43 +01:00
armv7m.h hw/arm/armv7m: Create input clocks 2021-09-01 11:08:19 +01:00
aspeed_soc.h aspeed: Make aspeed_board_init_flashes public 2022-07-14 16:24:38 +02:00
aspeed.h hw/arm/aspeed: Allow machine to set UART default 2021-09-20 08:50:59 +02:00
bcm2835_peripherals.h Align Raspberry Pi DMA interrupts with Linux DTS 2022-07-18 13:25:13 +01:00
bcm2836.h
boot.h target/arm: Make boards pass base address to armv7m_load_kernel() 2022-09-14 11:19:40 +01:00
digic.h
exynos4210.h hw/arm/exynos4210: Drop Exynos4210Irq struct 2022-04-21 11:37:04 +01:00
fdt.h
fsl-imx6.h hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
fsl-imx6ul.h hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
fsl-imx7.h fsl-imx7: Instantiate SAI1/2/3 as unimplemented devices 2021-08-25 10:48:51 +01:00
fsl-imx25.h hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
fsl-imx31.h hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
linux-boot-if.h
msf2-soc.h hw/arm/msf2-soc: Wire up refclk 2021-09-01 11:08:20 +01:00
npcm7xx.h hw/arm: Add Nuvoton SD module to board 2021-11-02 14:14:55 -04:00
nrf51_soc.h hw/arm/nrf51: Wire up sysclk 2021-09-01 11:08:20 +01:00
nrf51.h
omap.h
primecell.h
pxa.h
raspi_platform.h
sharpsl.h
smmu-common.h hw/arm/smmuv3: Cache event fault record 2022-04-28 13:57:33 +01:00
smmuv3.h
soc_dma.h
stm32f100_soc.h hw/arm/stm32f100: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
stm32f205_soc.h hw/arm/stm32f205: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
stm32f405_soc.h hw/arm/stm32f405: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
virt.h hw/arm/virt: dt: add rng-seed property 2022-07-07 11:36:07 +01:00
xlnx-versal.h hw/arm: versal: Connect the CRL 2022-04-21 11:37:03 +01:00
xlnx-zynqmp.h hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers 2022-09-29 17:40:01 +01:00