b7c290177c
The 'qemu64' CPUID currently reports a family/model/stepping that approximately corresponds to an AMD K7 vintage architecture. The K7 series predates the introduction of 64-bit support by AMD in the K8 series. This has been reported to lead to LLVM complaints about generating 64-bit code for a 32-bit CPU target LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! It appears LLVM looks at the family/model/stepping, despite qemu64 reporting it is 64-bit capable. This patch changes 'qemu64' to report a CPUID with the family, model and stepping taken from a AMD Athlon(tm) 64 X2 Dual Core Processor 4000+ which is one of the first 64-bit AMD CPUs. Closes https://gitlab.com/qemu-project/qemu/-/issues/191 Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20210507133650.645526-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> |
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alpha | ||
arm | ||
avr | ||
cris | ||
hexagon | ||
hppa | ||
i386 | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
openrisc | ||
ppc | ||
riscv | ||
rx | ||
s390x | ||
sh4 | ||
sparc | ||
tricore | ||
xtensa | ||
meson.build |