221 lines
6.1 KiB
C
221 lines
6.1 KiB
C
/*
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* ARM AdvSIMD / SVE Vector Helpers
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*
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* Copyright (c) 2020 Linaro
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_ARM_VEC_INTERNALS_H
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#define TARGET_ARM_VEC_INTERNALS_H
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/*
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* Note that vector data is stored in host-endian 64-bit chunks,
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* so addressing units smaller than that needs a host-endian fixup.
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*
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* The H<N> macros are used when indexing an array of elements of size N.
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*
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* The H1_<N> macros are used when performing byte arithmetic and then
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* casting the final pointer to a type of size N.
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*/
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#ifdef HOST_WORDS_BIGENDIAN
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#define H1(x) ((x) ^ 7)
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#define H1_2(x) ((x) ^ 6)
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#define H1_4(x) ((x) ^ 4)
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#define H2(x) ((x) ^ 3)
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#define H4(x) ((x) ^ 1)
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#else
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#define H1(x) (x)
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#define H1_2(x) (x)
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#define H1_4(x) (x)
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#define H2(x) (x)
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#define H4(x) (x)
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#endif
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/*
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* Access to 64-bit elements isn't host-endian dependent; we provide H8
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* and H1_8 so that when a function is being generated from a macro we
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* can pass these rather than an empty macro argument, for clarity.
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*/
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#define H8(x) (x)
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#define H1_8(x) (x)
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/* Data for expanding active predicate bits to bytes, for byte elements. */
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extern const uint64_t expand_pred_b_data[256];
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static inline void clear_tail(void *vd, uintptr_t opr_sz, uintptr_t max_sz)
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{
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uint64_t *d = vd + opr_sz;
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uintptr_t i;
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for (i = opr_sz; i < max_sz; i += 8) {
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*d++ = 0;
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}
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}
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static inline int32_t do_sqrshl_bhs(int32_t src, int32_t shift, int bits,
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bool round, uint32_t *sat)
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{
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if (shift <= -bits) {
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/* Rounding the sign bit always produces 0. */
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if (round) {
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return 0;
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}
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return src >> 31;
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} else if (shift < 0) {
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if (round) {
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src >>= -shift - 1;
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return (src >> 1) + (src & 1);
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}
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return src >> -shift;
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} else if (shift < bits) {
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int32_t val = src << shift;
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if (bits == 32) {
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if (!sat || val >> shift == src) {
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return val;
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}
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} else {
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int32_t extval = sextract32(val, 0, bits);
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if (!sat || val == extval) {
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return extval;
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}
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}
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} else if (!sat || src == 0) {
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return 0;
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}
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*sat = 1;
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return (1u << (bits - 1)) - (src >= 0);
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}
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static inline uint32_t do_uqrshl_bhs(uint32_t src, int32_t shift, int bits,
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bool round, uint32_t *sat)
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{
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if (shift <= -(bits + round)) {
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return 0;
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} else if (shift < 0) {
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if (round) {
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src >>= -shift - 1;
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return (src >> 1) + (src & 1);
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}
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return src >> -shift;
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} else if (shift < bits) {
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uint32_t val = src << shift;
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if (bits == 32) {
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if (!sat || val >> shift == src) {
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return val;
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}
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} else {
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uint32_t extval = extract32(val, 0, bits);
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if (!sat || val == extval) {
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return extval;
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}
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}
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} else if (!sat || src == 0) {
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return 0;
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}
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*sat = 1;
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return MAKE_64BIT_MASK(0, bits);
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}
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static inline int32_t do_suqrshl_bhs(int32_t src, int32_t shift, int bits,
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bool round, uint32_t *sat)
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{
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if (sat && src < 0) {
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*sat = 1;
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return 0;
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}
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return do_uqrshl_bhs(src, shift, bits, round, sat);
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}
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static inline int64_t do_sqrshl_d(int64_t src, int64_t shift,
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bool round, uint32_t *sat)
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{
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if (shift <= -64) {
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/* Rounding the sign bit always produces 0. */
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if (round) {
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return 0;
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}
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return src >> 63;
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} else if (shift < 0) {
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if (round) {
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src >>= -shift - 1;
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return (src >> 1) + (src & 1);
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}
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return src >> -shift;
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} else if (shift < 64) {
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int64_t val = src << shift;
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if (!sat || val >> shift == src) {
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return val;
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}
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} else if (!sat || src == 0) {
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return 0;
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}
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*sat = 1;
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return src < 0 ? INT64_MIN : INT64_MAX;
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}
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static inline uint64_t do_uqrshl_d(uint64_t src, int64_t shift,
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bool round, uint32_t *sat)
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{
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if (shift <= -(64 + round)) {
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return 0;
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} else if (shift < 0) {
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if (round) {
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src >>= -shift - 1;
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return (src >> 1) + (src & 1);
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}
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return src >> -shift;
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} else if (shift < 64) {
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uint64_t val = src << shift;
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if (!sat || val >> shift == src) {
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return val;
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}
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} else if (!sat || src == 0) {
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return 0;
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}
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*sat = 1;
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return UINT64_MAX;
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}
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static inline int64_t do_suqrshl_d(int64_t src, int64_t shift,
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bool round, uint32_t *sat)
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{
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if (sat && src < 0) {
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*sat = 1;
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return 0;
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}
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return do_uqrshl_d(src, shift, round, sat);
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}
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int8_t do_sqrdmlah_b(int8_t, int8_t, int8_t, bool, bool);
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int16_t do_sqrdmlah_h(int16_t, int16_t, int16_t, bool, bool, uint32_t *);
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int32_t do_sqrdmlah_s(int32_t, int32_t, int32_t, bool, bool, uint32_t *);
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int64_t do_sqrdmlah_d(int64_t, int64_t, int64_t, bool, bool);
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/*
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* 8 x 8 -> 16 vector polynomial multiply where the inputs are
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* in the low 8 bits of each 16-bit element
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*/
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uint64_t pmull_h(uint64_t op1, uint64_t op2);
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/*
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* 16 x 16 -> 32 vector polynomial multiply where the inputs are
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* in the low 16 bits of each 32-bit element
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*/
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uint64_t pmull_w(uint64_t op1, uint64_t op2);
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#endif /* TARGET_ARM_VEC_INTERNALS_H */
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