Cédric Le Goater 34b0696be4 ppc/pnv: Add support for PHB5 "Address-based trigger" mode ... When the Address-Based Interrupt Trigger mode is activated, the PHB maps the interrupt source number into the interrupt command address. The PHB directly triggers the IC ESB page of the interrupt number and not the notify page of the IC anymore. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>		2022-03-02 06:51:39 +01:00
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bonito.c
designware.c
gpex-acpi.c
gpex.c
grackle.c
i440fx.c
Kconfig
meson.build
mv643xx.h
mv64361.c
pam.c
pnv_phb3_msi.c	dma: Let dma_memory_read/write() take MemTxAttrs argument	2021-12-30 17:16:32 +01:00
pnv_phb3_pbcq.c	ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize()	2021-12-17 17:57:19 +01:00
pnv_phb3.c	ppc/pnv: use a do-while() loop in pnv_phb3_translate_tve()	2022-01-28 13:15:02 +01:00
pnv_phb4_pec.c	ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge	2022-03-02 06:51:39 +01:00
pnv_phb4.c	ppc/pnv: Add support for PHB5 "Address-based trigger" mode	2022-03-02 06:51:39 +01:00
ppce500.c
q35.c
raven.c
remote.c
sabre.c
sh_pci.c	hw/sh4: Coding style: White space fixes	2021-10-30 11:46:40 +02:00
trace-events	ppc/pnv: Add support for PHB5 "Address-based trigger" mode	2022-03-02 06:51:39 +01:00
trace.h
uninorth.c
versatile.c
xen_igd_pt.c
xilinx-pcie.c