a90a862b9e
The SSE-200 hardware has configurable integration settings which determine whether its two CPUs have the FPU and DSP: * CPU0_FPU (default 0) * CPU0_DSP (default 0) * CPU1_FPU (default 1) * CPU1_DSP (default 1) Similarly, the IoTKit has settings for its single CPU: * CPU0_FPU (default 1) * CPU0_DSP (default 1) Of our four boards that use either the IoTKit or the SSE-200: * mps2-an505, mps2-an521 and musca-a use the default settings * musca-b1 enables FPU and DSP on both CPUs Currently QEMU models all these boards using CPUs with both FPU and DSP enabled. This means that we are incorrect for mps2-an521 and musca-a, which should not have FPU or DSP on CPU0. Create QOM properties on the ARMSSE devices corresponding to the default h/w integration settings, and make the Musca-B1 board enable FPU and DSP on both CPUs. This fixes the mps2-an521 and musca-a behaviour, and leaves the musca-b1 and mps2-an505 behaviour unchanged. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190517174046.11146-5-peter.maydell@linaro.org |
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| .. | ||
| allwinner-a10.h | ||
| armsse.h | ||
| armv7m.h | ||
| aspeed_soc.h | ||
| aspeed.h | ||
| bcm2835_peripherals.h | ||
| bcm2836.h | ||
| boot.h | ||
| digic.h | ||
| exynos4210.h | ||
| fdt.h | ||
| fsl-imx6.h | ||
| fsl-imx6ul.h | ||
| fsl-imx7.h | ||
| fsl-imx25.h | ||
| fsl-imx31.h | ||
| linux-boot-if.h | ||
| msf2-soc.h | ||
| nrf51_soc.h | ||
| nrf51.h | ||
| omap.h | ||
| primecell.h | ||
| pxa.h | ||
| raspi_platform.h | ||
| sharpsl.h | ||
| smmu-common.h | ||
| smmuv3.h | ||
| soc_dma.h | ||
| stm32f205_soc.h | ||
| sysbus-fdt.h | ||
| virt.h | ||
| xlnx-versal.h | ||
| xlnx-zynqmp.h | ||