Pavel Dovgalyuk b9e40bac9c target/openrisc: fix icount handling for timer instructions ... This patch adds icount handling to mfspr/mtspr instructions that may deal with hardware timers. Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru> Message-Id: <161700376169.1135890.8707223959310729949.stgit@pasha-ThinkPad-X280> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Stafford Horne <shorne@gmail.com>		2021-04-01 10:37:20 +02:00
..
cpu-param.h
cpu.c	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
cpu.h	target/openrisc: Move pic_cpu code into CPU object proper	2020-12-15 12:04:30 +00:00
disas.c	meson: target	2020-08-21 06:30:35 -04:00
exception_helper.c
exception.c
exception.h
fpu_helper.c
gdbstub.c
helper.h
insns.decode
interrupt_helper.c
interrupt.c
machine.c	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
meson.build	meson: target	2020-08-21 06:30:35 -04:00
mmu.c
sys_helper.c	target/openrisc: Remove dead code attempting to check "is timer disabled"	2020-11-17 12:56:32 +00:00
translate.c	target/openrisc: fix icount handling for timer instructions	2021-04-01 10:37:20 +02:00