128 lines
4.3 KiB
C
128 lines
4.3 KiB
C
/*
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* QEMU ETRAX System Emulator
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*
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* Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <time.h>
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#include <sys/time.h>
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#include "hw.h"
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#include "sysemu.h"
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#include "flash.h"
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#include "boards.h"
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static void main_cpu_reset(void *opaque)
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{
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CPUState *env = opaque;
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cpu_reset(env);
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}
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/* Init functions for different blocks. */
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extern qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base);
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void etraxfs_timer_init(CPUState *env, qemu_irq *irqs,
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target_phys_addr_t base);
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void etraxfs_ser_init(CPUState *env, qemu_irq *irqs, target_phys_addr_t base);
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static
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void bareetraxfs_init (int ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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CPUState *env;
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qemu_irq *pic;
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int kernel_size;
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int flash_size = 0x800000;
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int index;
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ram_addr_t phys_flash;
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ram_addr_t phys_ram;
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/* init CPUs */
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if (cpu_model == NULL) {
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cpu_model = "crisv32";
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}
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env = cpu_init(cpu_model);
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/* register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); */
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qemu_register_reset(main_cpu_reset, env);
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/* allocate RAM */
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phys_ram = qemu_ram_alloc(ram_size);
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cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
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/* Unached mapping. */
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cpu_register_physical_memory(0xc0000000, ram_size, phys_ram | IO_MEM_RAM);
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phys_flash = qemu_ram_alloc(flash_size);
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cpu_register_physical_memory(0,flash_size, IO_MEM_ROM);
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cpu_register_physical_memory(0x80000000, flash_size, IO_MEM_ROM);
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cpu_register_physical_memory(0x04000000, flash_size, IO_MEM_ROM);
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cpu_register_physical_memory(0x84000000, flash_size,
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0x04000000 | IO_MEM_ROM);
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index = drive_get_index(IF_PFLASH, 0, 0);
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pflash_cfi01_register(0x80000000, flash_size,
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drives_table[index].bdrv, 65536, flash_size >> 16,
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4, 0x0000, 0x0000, 0x0000, 0x0000);
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index = drive_get_index(IF_PFLASH, 0, 1);
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pflash_cfi01_register(0x84000000, flash_size,
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drives_table[index].bdrv, 65536, flash_size >> 16,
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4, 0x0000, 0x0000, 0x0000, 0x0000);
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pic = etraxfs_pic_init(env, 0xb001c000);
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/* 2 timers. */
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etraxfs_timer_init(env, pic, 0xb001e000);
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etraxfs_timer_init(env, pic, 0xb005e000);
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/* 4 serial ports. */
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etraxfs_ser_init(env, pic, 0xb0026000);
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etraxfs_ser_init(env, pic, 0xb0028000);
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etraxfs_ser_init(env, pic, 0xb002a000);
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etraxfs_ser_init(env, pic, 0xb002c000);
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kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
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/* magic for boot. */
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env->regs[8] = 0x56902387;
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env->regs[9] = 0x40004000 + kernel_size;
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env->pc = 0x40004000;
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{
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unsigned char *ptr = phys_ram_base + 0x4000;
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int i;
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for (i = 0; i < 8; i++)
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{
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printf ("%2.2x ", ptr[i]);
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}
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printf("\n");
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}
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printf ("pc =%x\n", env->pc);
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printf ("ram size =%d\n", ram_size);
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printf ("kernel name =%s\n", kernel_filename);
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printf ("kernel size =%d\n", kernel_size);
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printf ("cpu haltd =%d\n", env->halted);
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}
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void DMA_run(void)
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{
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}
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QEMUMachine bareetraxfs_machine = {
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"bareetraxfs",
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"Bare ETRAX FS board",
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bareetraxfs_init,
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};
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