c227f0995e
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b72.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/*
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* Memory mapped access to ISA IO space.
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "isa.h"
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static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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cpu_outb(addr & IOPORTS_MASK, val);
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}
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static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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cpu_outw(addr & IOPORTS_MASK, val);
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}
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static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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cpu_outl(addr & IOPORTS_MASK, val);
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}
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static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
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{
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uint32_t val;
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val = cpu_inb(addr & IOPORTS_MASK);
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return val;
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}
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static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr)
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{
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uint32_t val;
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val = cpu_inw(addr & IOPORTS_MASK);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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return val;
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}
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static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
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{
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uint32_t val;
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val = cpu_inl(addr & IOPORTS_MASK);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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return val;
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}
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static CPUWriteMemoryFunc * const isa_mmio_write[] = {
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&isa_mmio_writeb,
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&isa_mmio_writew,
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&isa_mmio_writel,
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};
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static CPUReadMemoryFunc * const isa_mmio_read[] = {
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&isa_mmio_readb,
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&isa_mmio_readw,
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&isa_mmio_readl,
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};
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static int isa_mmio_iomemtype = 0;
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void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
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{
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if (!isa_mmio_iomemtype) {
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isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read,
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isa_mmio_write, NULL);
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}
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cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
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}
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