d136ecc085
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201016143509.26692-1-chetan4windows@gmail.com> [PMD: Split hw/ vs target/] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/*
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* Inter-Thread Communication Unit emulation.
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*
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* Copyright (c) 2016 Imagination Technologies
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef MIPS_ITU_H
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#define MIPS_ITU_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_MIPS_ITU "mips-itu"
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OBJECT_DECLARE_SIMPLE_TYPE(MIPSITUState, MIPS_ITU)
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#define ITC_CELL_DEPTH_SHIFT 2
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#define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT)
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typedef struct ITCStorageCell {
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struct {
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uint8_t FIFODepth; /* Log2 of the cell depth */
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uint8_t FIFOPtr; /* Number of elements in a FIFO cell */
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uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */
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uint8_t T; /* Trap Bit */
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uint8_t F; /* Full Bit */
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uint8_t E; /* Empty Bit */
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} tag;
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/* Index of the oldest element in the queue */
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uint8_t fifo_out;
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/* Circular buffer for FIFO. Semaphore cells use index 0 only */
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uint64_t data[ITC_CELL_DEPTH];
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/* Bitmap tracking blocked threads on the cell.
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TODO: support >64 threads ? */
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uint64_t blocked_threads;
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} ITCStorageCell;
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#define ITC_ADDRESSMAP_NUM 2
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struct MIPSITUState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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int32_t num_fifo;
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int32_t num_semaphores;
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/* ITC Storage */
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ITCStorageCell *cell;
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MemoryRegion storage_io;
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/* ITC Configuration Tags */
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uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM];
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MemoryRegion tag_io;
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/* ITU Control Register */
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uint64_t icr0;
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/* SAAR */
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bool saar_present;
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void *saar;
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};
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/* Get ITC Configuration Tag memory region. */
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MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu);
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#endif /* MIPS_ITU_H */
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