bcdb90640a
The MC146818 is a Real Time Clock, not a timer.
Move it under the hw/rtc/ subdirectory.
Use copyright statement from 80cabfad16 for "hw/rtc/mc146818rtc.h".
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191003230404.19384-4-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
309 lines
9.5 KiB
C
309 lines
9.5 KiB
C
/*
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* QEMU/MIPS pseudo-board
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*
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* emulates a simple machine with ISA-like bus.
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* ISA IO space mapped to the 0x14000000 (PHYS) and
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* ISA memory at the 0x10000000 (PHYS, 16Mb in size).
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* All peripherial devices are attached to this "bus" with
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* the standard PC ISA addresses.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/mips/mips.h"
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#include "hw/mips/cpudevs.h"
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#include "hw/i386/pc.h"
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#include "hw/char/serial.h"
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#include "hw/isa/isa.h"
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#include "net/net.h"
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#include "hw/net/ne2000-isa.h"
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/block/flash.h"
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#include "qemu/log.h"
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#include "hw/mips/bios.h"
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#include "hw/ide.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "hw/rtc/mc146818rtc.h"
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#include "hw/input/i8042.h"
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#include "hw/timer/i8254.h"
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#include "exec/address-spaces.h"
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#include "sysemu/qtest.h"
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#include "sysemu/reset.h"
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#include "sysemu/runstate.h"
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#include "qemu/error-report.h"
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#define MAX_IDE_BUS 2
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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static const int ide_iobase2[2] = { 0x3f6, 0x376 };
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static const int ide_irq[2] = { 14, 15 };
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static ISADevice *pit; /* PIT i8254 */
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/* i8254 PIT is attached to the IRQ0 at PIC i8259 */
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static struct _loaderparams {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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} loaderparams;
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static void mips_qemu_write (void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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if ((addr & 0xffff) == 0 && val == 42)
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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else if ((addr & 0xffff) == 4 && val == 42)
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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}
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static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
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unsigned size)
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{
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return 0;
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}
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static const MemoryRegionOps mips_qemu_ops = {
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.read = mips_qemu_read,
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.write = mips_qemu_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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typedef struct ResetData {
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MIPSCPU *cpu;
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uint64_t vector;
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} ResetData;
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static int64_t load_kernel(void)
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{
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const size_t params_size = 264;
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int64_t entry, kernel_high, initrd_size;
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long kernel_size;
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ram_addr_t initrd_offset;
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uint32_t *params_buf;
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int big_endian;
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#ifdef TARGET_WORDS_BIGENDIAN
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big_endian = 1;
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#else
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big_endian = 0;
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#endif
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kernel_size = load_elf(loaderparams.kernel_filename, NULL,
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cpu_mips_kseg0_to_phys, NULL,
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(uint64_t *)&entry, NULL,
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(uint64_t *)&kernel_high, big_endian,
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EM_MIPS, 1, 0);
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if (kernel_size >= 0) {
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if ((entry & ~0x7fffffffULL) == 0x80000000)
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entry = (int32_t)entry;
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} else {
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error_report("could not load kernel '%s': %s",
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loaderparams.kernel_filename,
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load_elf_strerror(kernel_size));
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exit(1);
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}
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/* load initrd */
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initrd_size = 0;
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initrd_offset = 0;
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if (loaderparams.initrd_filename) {
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initrd_size = get_image_size (loaderparams.initrd_filename);
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if (initrd_size > 0) {
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initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
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if (initrd_offset + initrd_size > ram_size) {
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error_report("memory too small for initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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initrd_size = load_image_targphys(loaderparams.initrd_filename,
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initrd_offset,
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ram_size - initrd_offset);
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}
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if (initrd_size == (target_ulong) -1) {
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error_report("could not load initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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}
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/* Store command line. */
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params_buf = g_malloc(params_size);
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params_buf[0] = tswap32(ram_size);
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params_buf[1] = tswap32(0x12345678);
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if (initrd_size > 0) {
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snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
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cpu_mips_phys_to_kseg0(NULL, initrd_offset),
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initrd_size, loaderparams.kernel_cmdline);
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} else {
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snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
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}
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rom_add_blob_fixed("params", params_buf, params_size,
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16 * MiB - params_size);
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g_free(params_buf);
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return entry;
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}
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static void main_cpu_reset(void *opaque)
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{
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ResetData *s = (ResetData *)opaque;
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CPUMIPSState *env = &s->cpu->env;
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cpu_reset(CPU(s->cpu));
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env->active_tc.PC = s->vector;
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}
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static const int sector_len = 32 * KiB;
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static
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void mips_r4k_init(MachineState *machine)
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{
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ram_addr_t ram_size = machine->ram_size;
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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char *filename;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *bios;
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MemoryRegion *iomem = g_new(MemoryRegion, 1);
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MemoryRegion *isa_io = g_new(MemoryRegion, 1);
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MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
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int bios_size;
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MIPSCPU *cpu;
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CPUMIPSState *env;
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ResetData *reset_info;
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int i;
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qemu_irq *i8259;
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ISABus *isa_bus;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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DriveInfo *dinfo;
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int be;
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/* init CPUs */
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cpu = MIPS_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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reset_info = g_malloc0(sizeof(ResetData));
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reset_info->cpu = cpu;
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reset_info->vector = env->active_tc.PC;
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qemu_register_reset(main_cpu_reset, reset_info);
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/* allocate RAM */
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if (ram_size > 256 * MiB) {
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error_report("Too much memory for this machine: %" PRId64 "MB,"
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" maximum 256MB", ram_size / MiB);
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exit(1);
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}
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memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
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memory_region_add_subregion(address_space_mem, 0, ram);
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memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
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memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
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/* Try to load a BIOS image. If this fails, we continue regardless,
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but initialize the hardware ourselves. When a kernel gets
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preloaded we also initialize the hardware, since the BIOS wasn't
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run. */
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if (bios_name == NULL)
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bios_name = BIOS_FILENAME;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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if (filename) {
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bios_size = get_image_size(filename);
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} else {
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bios_size = -1;
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}
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#ifdef TARGET_WORDS_BIGENDIAN
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be = 1;
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#else
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be = 0;
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#endif
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if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
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bios = g_new(MemoryRegion, 1);
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memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
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&error_fatal);
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memory_region_set_readonly(bios, true);
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memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
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load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
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} else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
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uint32_t mips_rom = 0x00400000;
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if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
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blk_by_legacy_dinfo(dinfo),
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sector_len, 4, 0, 0, 0, 0, be)) {
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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}
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} else if (!qtest_enabled()) {
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/* not fatal */
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warn_report("could not load MIPS bios '%s'", bios_name);
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}
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g_free(filename);
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if (kernel_filename) {
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loaderparams.ram_size = ram_size;
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loaderparams.kernel_filename = kernel_filename;
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loaderparams.kernel_cmdline = kernel_cmdline;
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loaderparams.initrd_filename = initrd_filename;
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reset_info->vector = load_kernel();
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}
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/* Init CPU internal devices */
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cpu_mips_irq_init_cpu(cpu);
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cpu_mips_clock_init(cpu);
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/* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
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memory_region_init_alias(isa_io, NULL, "isa-io",
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get_system_io(), 0, 0x00010000);
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memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
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memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
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memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
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isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
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/* The PIC is attached to the MIPS CPU INT0 pin */
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i8259 = i8259_init(isa_bus, env->irq[2]);
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isa_bus_irqs(isa_bus, i8259);
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mc146818_rtc_init(isa_bus, 2000, NULL);
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pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
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serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS);
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isa_vga_init(isa_bus);
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if (nd_table[0].used)
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isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
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ide_drive_get(hd, ARRAY_SIZE(hd));
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for(i = 0; i < MAX_IDE_BUS; i++)
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isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
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hd[MAX_IDE_DEVS * i],
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hd[MAX_IDE_DEVS * i + 1]);
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isa_create_simple(isa_bus, TYPE_I8042);
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}
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static void mips_machine_init(MachineClass *mc)
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{
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mc->desc = "mips r4k platform";
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mc->init = mips_r4k_init;
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mc->block_default_type = IF_IDE;
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#ifdef TARGET_MIPS64
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mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
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#else
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mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
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#endif
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}
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DEFINE_MACHINE("mips", mips_machine_init)
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