Jason Wang bd2baaccd5 acpi: add ATSR for q35 ... This patch provides ATSR which was a requirement for software that wants to enable ATS on endpoint devices behind a Root Port. This is done simply by setting ALL_PORTS which indicates all PCI-Express Root Ports support ATS transactions. Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2017-01-10 05:56:59 +02:00
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kvm	kvmclock: reduce kvmclock difference on migration	2016-12-22 16:00:56 +01:00
xen	xen_platform: SUSE xenlinux unplug for emulated PCI	2016-10-21 12:11:38 -07:00
acpi-build.c	acpi: add ATSR for q35	2017-01-10 05:56:59 +02:00
acpi-build.h	Use scripts/clean-includes to drop redundant qemu/typedefs.h	2016-03-22 22:20:16 +01:00
amd_iommu.c	i386: amd_iommu: fix MMIO register count and access	2016-12-16 01:14:38 +02:00
amd_iommu.h	i386: amd_iommu: fix MMIO register count and access	2016-12-16 01:14:38 +02:00
intel_iommu_internal.h	intel_iommu: support device iotlb descriptor	2017-01-10 05:56:58 +02:00
intel_iommu.c	intel_iommu: support device iotlb descriptor	2017-01-10 05:56:58 +02:00
kvmvapic.c	*_run_on_cpu: introduce run_on_cpu_data type	2016-10-31 15:00:25 +01:00
Makefile.objs	hw/i386: Introduce AMD IOMMU	2016-09-24 01:02:00 +03:00
multiboot.c	multiboot: copy the cmdline verbatim, unescape module strings	2016-12-22 16:00:26 +01:00
multiboot.h	refer to FWCfgState explicitly	2013-06-02 18:14:02 +03:00
pc_piix.c	pc: make pit configurable	2016-12-22 16:00:25 +01:00
pc_q35.c	pc: make pit configurable	2016-12-22 16:00:25 +01:00
pc_sysfw.c	include/qemu/osdep.h: Don't include qapi/error.h	2016-03-22 22:20:15 +01:00
pc.c	pc: make pit configurable	2016-12-22 16:00:25 +01:00
pci-assign-load-rom.c	pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.c	2016-06-29 14:03:47 +02:00
trace-events	trace: move hw/mem/pc-dimm.c trace points into correct file	2016-09-28 19:17:54 +01:00
x86-iommu.c	intel_iommu: support device iotlb descriptor	2017-01-10 05:56:58 +02:00