521 lines
15 KiB
C
521 lines
15 KiB
C
/*
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* S/390 misc helper routines
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2009 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "exec/memory.h"
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#include "qemu/host-utils.h"
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#include "helper.h"
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#include <string.h>
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#include "sysemu/kvm.h"
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#include "qemu/timer.h"
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#ifdef CONFIG_KVM
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#include <linux/kvm.h>
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#endif
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#if !defined(CONFIG_USER_ONLY)
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#include "exec/softmmu_exec.h"
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#include "sysemu/cpus.h"
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#include "sysemu/sysemu.h"
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#endif
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/* #define DEBUG_HELPER */
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#ifdef DEBUG_HELPER
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#define HELPER_LOG(x...) qemu_log(x)
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#else
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#define HELPER_LOG(x...)
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#endif
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/* Raise an exception dynamically from a helper function. */
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void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
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uintptr_t retaddr)
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{
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int t;
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env->exception_index = EXCP_PGM;
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env->int_pgm_code = excp;
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/* Use the (ultimate) callers address to find the insn that trapped. */
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cpu_restore_state(env, retaddr);
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/* Advance past the insn. */
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t = cpu_ldub_code(env, env->psw.addr);
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env->int_pgm_ilen = t = get_ilen(t);
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env->psw.addr += 2 * t;
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cpu_loop_exit(env);
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}
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/* Raise an exception statically from a TB. */
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void HELPER(exception)(CPUS390XState *env, uint32_t excp)
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{
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HELPER_LOG("%s: exception %d\n", __func__, excp);
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env->exception_index = excp;
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cpu_loop_exit(env);
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}
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#ifndef CONFIG_USER_ONLY
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/* EBCDIC handling */
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static const uint8_t ebcdic2ascii[] = {
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0x00, 0x01, 0x02, 0x03, 0x07, 0x09, 0x07, 0x7F,
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0x07, 0x07, 0x07, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
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0x10, 0x11, 0x12, 0x13, 0x07, 0x0A, 0x08, 0x07,
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0x18, 0x19, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
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0x07, 0x07, 0x1C, 0x07, 0x07, 0x0A, 0x17, 0x1B,
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0x07, 0x07, 0x07, 0x07, 0x07, 0x05, 0x06, 0x07,
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0x07, 0x07, 0x16, 0x07, 0x07, 0x07, 0x07, 0x04,
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0x07, 0x07, 0x07, 0x07, 0x14, 0x15, 0x07, 0x1A,
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0x20, 0xFF, 0x83, 0x84, 0x85, 0xA0, 0x07, 0x86,
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0x87, 0xA4, 0x5B, 0x2E, 0x3C, 0x28, 0x2B, 0x21,
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0x26, 0x82, 0x88, 0x89, 0x8A, 0xA1, 0x8C, 0x07,
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0x8D, 0xE1, 0x5D, 0x24, 0x2A, 0x29, 0x3B, 0x5E,
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0x2D, 0x2F, 0x07, 0x8E, 0x07, 0x07, 0x07, 0x8F,
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0x80, 0xA5, 0x07, 0x2C, 0x25, 0x5F, 0x3E, 0x3F,
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0x07, 0x90, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
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0x70, 0x60, 0x3A, 0x23, 0x40, 0x27, 0x3D, 0x22,
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0x07, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
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0x68, 0x69, 0xAE, 0xAF, 0x07, 0x07, 0x07, 0xF1,
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0xF8, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
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0x71, 0x72, 0xA6, 0xA7, 0x91, 0x07, 0x92, 0x07,
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0xE6, 0x7E, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
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0x79, 0x7A, 0xAD, 0xAB, 0x07, 0x07, 0x07, 0x07,
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0x9B, 0x9C, 0x9D, 0xFA, 0x07, 0x07, 0x07, 0xAC,
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0xAB, 0x07, 0xAA, 0x7C, 0x07, 0x07, 0x07, 0x07,
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0x7B, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
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0x48, 0x49, 0x07, 0x93, 0x94, 0x95, 0xA2, 0x07,
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0x7D, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50,
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0x51, 0x52, 0x07, 0x96, 0x81, 0x97, 0xA3, 0x98,
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0x5C, 0xF6, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
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0x59, 0x5A, 0xFD, 0x07, 0x99, 0x07, 0x07, 0x07,
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0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
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0x38, 0x39, 0x07, 0x07, 0x9A, 0x07, 0x07, 0x07,
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};
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static const uint8_t ascii2ebcdic[] = {
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0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
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0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
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0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
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0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
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0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
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0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
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0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
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0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
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0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
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0xC8, 0xC9, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6,
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0xD7, 0xD8, 0xD9, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6,
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0xE7, 0xE8, 0xE9, 0xBA, 0xE0, 0xBB, 0xB0, 0x6D,
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0x79, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
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0x88, 0x89, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96,
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0x97, 0x98, 0x99, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6,
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0xA7, 0xA8, 0xA9, 0xC0, 0x4F, 0xD0, 0xA1, 0x07,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x59, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x90, 0x3F, 0x3F, 0x3F, 0x3F, 0xEA, 0x3F, 0xFF
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};
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static inline void ebcdic_put(uint8_t *p, const char *ascii, int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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p[i] = ascii2ebcdic[(uint8_t)ascii[i]];
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}
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}
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void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
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{
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qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
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env->psw.addr);
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if (kvm_enabled()) {
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#ifdef CONFIG_KVM
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kvm_s390_interrupt(s390_env_get_cpu(env), KVM_S390_PROGRAM_INT, code);
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#endif
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} else {
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env->int_pgm_code = code;
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env->int_pgm_ilen = ilen;
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env->exception_index = EXCP_PGM;
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cpu_loop_exit(env);
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}
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}
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/* SCLP service call */
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uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
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{
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int r = sclp_service_call(r1, r2);
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if (r < 0) {
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program_interrupt(env, -r, 4);
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return 0;
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}
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return r;
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}
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#ifndef CONFIG_USER_ONLY
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static void cpu_reset_all(void)
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{
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CPUState *cs;
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S390CPUClass *scc;
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CPU_FOREACH(cs) {
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scc = S390_CPU_GET_CLASS(cs);
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scc->cpu_reset(cs);
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}
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}
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static int load_normal_reset(S390CPU *cpu)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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pause_all_vcpus();
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cpu_synchronize_all_states();
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cpu_reset_all();
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io_subsystem_reset();
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scc->initial_cpu_reset(CPU(cpu));
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scc->load_normal(CPU(cpu));
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cpu_synchronize_all_post_reset();
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resume_all_vcpus();
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return 0;
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}
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#define DIAG_308_RC_NO_CONF 0x0102
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#define DIAG_308_RC_INVALID 0x0402
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void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
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{
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uint64_t addr = env->regs[r1];
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uint64_t subcode = env->regs[r3];
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if (env->psw.mask & PSW_MASK_PSTATE) {
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program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
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return;
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}
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if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
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program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
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return;
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}
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switch (subcode) {
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case 1:
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load_normal_reset(s390_env_get_cpu(env));
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break;
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case 5:
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if ((r1 & 1) || (addr & 0x0fffULL)) {
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program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
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return;
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}
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env->regs[r1+1] = DIAG_308_RC_INVALID;
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return;
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case 6:
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if ((r1 & 1) || (addr & 0x0fffULL)) {
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program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
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return;
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}
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env->regs[r1+1] = DIAG_308_RC_NO_CONF;
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return;
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default:
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hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
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break;
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}
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}
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#endif
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/* DIAG */
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uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
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uint64_t code)
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{
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uint64_t r;
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switch (num) {
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case 0x500:
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/* KVM hypercall */
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r = s390_virtio_hypercall(env);
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break;
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case 0x44:
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/* yield */
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r = 0;
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break;
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case 0x308:
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/* ipl */
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r = 0;
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break;
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default:
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r = -1;
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break;
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}
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if (r) {
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program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
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}
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return r;
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}
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/* Set Prefix */
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void HELPER(spx)(CPUS390XState *env, uint64_t a1)
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{
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uint32_t prefix = a1 & 0x7fffe000;
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env->psa = prefix;
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qemu_log("prefix: %#x\n", prefix);
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tlb_flush_page(env, 0);
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tlb_flush_page(env, TARGET_PAGE_SIZE);
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}
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static inline uint64_t clock_value(CPUS390XState *env)
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{
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uint64_t time;
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time = env->tod_offset +
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time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
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return time;
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}
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/* Store Clock */
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uint64_t HELPER(stck)(CPUS390XState *env)
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{
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return clock_value(env);
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}
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/* Set Clock Comparator */
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void HELPER(sckc)(CPUS390XState *env, uint64_t time)
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{
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if (time == -1ULL) {
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return;
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}
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/* difference between now and then */
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time -= clock_value(env);
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/* nanoseconds */
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time = (time * 125) >> 9;
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timer_mod(env->tod_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
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}
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/* Store Clock Comparator */
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uint64_t HELPER(stckc)(CPUS390XState *env)
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{
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/* XXX implement */
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return 0;
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}
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/* Set CPU Timer */
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void HELPER(spt)(CPUS390XState *env, uint64_t time)
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{
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if (time == -1ULL) {
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return;
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}
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/* nanoseconds */
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time = (time * 125) >> 9;
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timer_mod(env->cpu_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
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}
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/* Store CPU Timer */
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uint64_t HELPER(stpt)(CPUS390XState *env)
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{
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/* XXX implement */
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return 0;
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}
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/* Store System Information */
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uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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uint64_t r0, uint64_t r1)
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{
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int cc = 0;
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int sel1, sel2;
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if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
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((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
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/* valid function code, invalid reserved bits */
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program_interrupt(env, PGM_SPECIFICATION, 2);
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}
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sel1 = r0 & STSI_R0_SEL1_MASK;
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sel2 = r1 & STSI_R1_SEL2_MASK;
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/* XXX: spec exception if sysib is not 4k-aligned */
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switch (r0 & STSI_LEVEL_MASK) {
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case STSI_LEVEL_1:
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if ((sel1 == 1) && (sel2 == 1)) {
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/* Basic Machine Configuration */
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struct sysib_111 sysib;
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memset(&sysib, 0, sizeof(sysib));
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ebcdic_put(sysib.manuf, "QEMU ", 16);
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/* same as machine type number in STORE CPU ID */
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ebcdic_put(sysib.type, "QEMU", 4);
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/* same as model number in STORE CPU ID */
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ebcdic_put(sysib.model, "QEMU ", 16);
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ebcdic_put(sysib.sequence, "QEMU ", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else if ((sel1 == 2) && (sel2 == 1)) {
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/* Basic Machine CPU */
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struct sysib_121 sysib;
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memset(&sysib, 0, sizeof(sysib));
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/* XXX make different for different CPUs? */
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ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else if ((sel1 == 2) && (sel2 == 2)) {
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/* Basic Machine CPUs */
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struct sysib_122 sysib;
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memset(&sysib, 0, sizeof(sysib));
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stl_p(&sysib.capability, 0x443afc29);
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/* XXX change when SMP comes */
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stw_p(&sysib.total_cpus, 1);
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stw_p(&sysib.active_cpus, 1);
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stw_p(&sysib.standby_cpus, 0);
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stw_p(&sysib.reserved_cpus, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else {
|
|
cc = 3;
|
|
}
|
|
break;
|
|
case STSI_LEVEL_2:
|
|
{
|
|
if ((sel1 == 2) && (sel2 == 1)) {
|
|
/* LPAR CPU */
|
|
struct sysib_221 sysib;
|
|
|
|
memset(&sysib, 0, sizeof(sysib));
|
|
/* XXX make different for different CPUs? */
|
|
ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
|
|
ebcdic_put(sysib.plant, "QEMU", 4);
|
|
stw_p(&sysib.cpu_addr, env->cpu_num);
|
|
stw_p(&sysib.cpu_id, 0);
|
|
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
|
|
} else if ((sel1 == 2) && (sel2 == 2)) {
|
|
/* LPAR CPUs */
|
|
struct sysib_222 sysib;
|
|
|
|
memset(&sysib, 0, sizeof(sysib));
|
|
stw_p(&sysib.lpar_num, 0);
|
|
sysib.lcpuc = 0;
|
|
/* XXX change when SMP comes */
|
|
stw_p(&sysib.total_cpus, 1);
|
|
stw_p(&sysib.conf_cpus, 1);
|
|
stw_p(&sysib.standby_cpus, 0);
|
|
stw_p(&sysib.reserved_cpus, 0);
|
|
ebcdic_put(sysib.name, "QEMU ", 8);
|
|
stl_p(&sysib.caf, 1000);
|
|
stw_p(&sysib.dedicated_cpus, 0);
|
|
stw_p(&sysib.shared_cpus, 0);
|
|
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
|
|
} else {
|
|
cc = 3;
|
|
}
|
|
break;
|
|
}
|
|
case STSI_LEVEL_3:
|
|
{
|
|
if ((sel1 == 2) && (sel2 == 2)) {
|
|
/* VM CPUs */
|
|
struct sysib_322 sysib;
|
|
|
|
memset(&sysib, 0, sizeof(sysib));
|
|
sysib.count = 1;
|
|
/* XXX change when SMP comes */
|
|
stw_p(&sysib.vm[0].total_cpus, 1);
|
|
stw_p(&sysib.vm[0].conf_cpus, 1);
|
|
stw_p(&sysib.vm[0].standby_cpus, 0);
|
|
stw_p(&sysib.vm[0].reserved_cpus, 0);
|
|
ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
|
|
stl_p(&sysib.vm[0].caf, 1000);
|
|
ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
|
|
cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
|
|
} else {
|
|
cc = 3;
|
|
}
|
|
break;
|
|
}
|
|
case STSI_LEVEL_CURRENT:
|
|
env->regs[0] = STSI_LEVEL_3;
|
|
break;
|
|
default:
|
|
cc = 3;
|
|
break;
|
|
}
|
|
|
|
return cc;
|
|
}
|
|
|
|
uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
|
|
uint64_t cpu_addr)
|
|
{
|
|
int cc = 0;
|
|
|
|
HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
|
|
__func__, order_code, r1, cpu_addr);
|
|
|
|
/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
|
|
as parameter (input). Status (output) is always R1. */
|
|
|
|
switch (order_code) {
|
|
case SIGP_SET_ARCH:
|
|
/* switch arch */
|
|
break;
|
|
case SIGP_SENSE:
|
|
/* enumerate CPU status */
|
|
if (cpu_addr) {
|
|
/* XXX implement when SMP comes */
|
|
return 3;
|
|
}
|
|
env->regs[r1] &= 0xffffffff00000000ULL;
|
|
cc = 1;
|
|
break;
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
case SIGP_RESTART:
|
|
qemu_system_reset_request();
|
|
cpu_loop_exit(env);
|
|
break;
|
|
case SIGP_STOP:
|
|
qemu_system_shutdown_request();
|
|
cpu_loop_exit(env);
|
|
break;
|
|
#endif
|
|
default:
|
|
/* unknown sigp */
|
|
fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
|
|
cc = 3;
|
|
}
|
|
|
|
return cc;
|
|
}
|
|
#endif
|