qemu-e2k/target
Richard Henderson 8844bb8d89 OpenRISC FPU Updates for 8.1
A few fixes and updates to bring OpenRISC inline with the latest
 architecture spec updates:
 
  - Allow FPCSR to be accessed in user mode
  - Select tininess detection before rounding
  - Fix FPE Exception PC value
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmRfPIEACgkQw7McLV5m
 J+RFuhAAt4xxci52fxvPpgUu/mjKU6mbYNjBEPEh+OAcb+m/BrvKhazZDACkyLMe
 ehavWtI856jfy6DsIA5wj5+zhgV8W5DR6a1mHIhmSAoVq7e+NnC5y0GJC9B0Xd/2
 FNOq/LZPtv/w7u+D1pFJaTb07hAaFVIC05Arn4dXa1k3yBuyjqIJnlrXa3Jt0pLW
 To/z1zch1rUp6RhFmGxU+8/qvTbzqkm/F3kbe8l2z34371lTd6KhPwvKaImMpTYQ
 dvULTMXjZ6Dp8BmUrDcnLMTL3NbYcPrI+qOHX1X+dwzNFyui2I8Ci7IfEKJ460ja
 Fe2Ku/aDfHSZYYayWaYSlrrZ1AH0fLLwIkHSs95+xUMsl81mtS6lIysj7fAFRnM5
 7tU4ov1T/leupvvUCUX5N4Yje/yvbuoAqGyhjDHzJ98vIe6fDhutU4Bm8/30q6Dy
 nKnfSgRHrrTrH042xW32DJnzaN2pEWrNtOMaegLMaqZ60app2YDaKJvtHLua1VjD
 b+g+X/+xBNb34k5e/f4z+GeGPoqE2wvwMcSkD+NBE8je3idPdMS/u5lQrvqvcbI/
 DJBRoPifNME/oYoTxPVKRnrCQIWQ6YkeLWVmqMfCVpjCF97gexo+UBUawJimTXFr
 gmcIYxv87oKF4KbCn7LsLlXGSpWSihKSBTHDxFPaKiRbnYZ5ais=
 =zqbX
 -----END PGP SIGNATURE-----

Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu into staging

OpenRISC FPU Updates for 8.1

A few fixes and updates to bring OpenRISC inline with the latest
architecture spec updates:

 - Allow FPCSR to be accessed in user mode
 - Select tininess detection before rounding
 - Fix FPE Exception PC value

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmRfPIEACgkQw7McLV5m
# J+RFuhAAt4xxci52fxvPpgUu/mjKU6mbYNjBEPEh+OAcb+m/BrvKhazZDACkyLMe
# ehavWtI856jfy6DsIA5wj5+zhgV8W5DR6a1mHIhmSAoVq7e+NnC5y0GJC9B0Xd/2
# FNOq/LZPtv/w7u+D1pFJaTb07hAaFVIC05Arn4dXa1k3yBuyjqIJnlrXa3Jt0pLW
# To/z1zch1rUp6RhFmGxU+8/qvTbzqkm/F3kbe8l2z34371lTd6KhPwvKaImMpTYQ
# dvULTMXjZ6Dp8BmUrDcnLMTL3NbYcPrI+qOHX1X+dwzNFyui2I8Ci7IfEKJ460ja
# Fe2Ku/aDfHSZYYayWaYSlrrZ1AH0fLLwIkHSs95+xUMsl81mtS6lIysj7fAFRnM5
# 7tU4ov1T/leupvvUCUX5N4Yje/yvbuoAqGyhjDHzJ98vIe6fDhutU4Bm8/30q6Dy
# nKnfSgRHrrTrH042xW32DJnzaN2pEWrNtOMaegLMaqZ60app2YDaKJvtHLua1VjD
# b+g+X/+xBNb34k5e/f4z+GeGPoqE2wvwMcSkD+NBE8je3idPdMS/u5lQrvqvcbI/
# DJBRoPifNME/oYoTxPVKRnrCQIWQ6YkeLWVmqMfCVpjCF97gexo+UBUawJimTXFr
# gmcIYxv87oKF4KbCn7LsLlXGSpWSihKSBTHDxFPaKiRbnYZ5ais=
# =zqbX
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 13 May 2023 08:30:09 AM BST
# gpg:                using RSA key D9C47354AEF86C103A25EFF1C3B31C2D5E6627E4
# gpg: Good signature from "Stafford Horne <shorne@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25  EFF1 C3B3 1C2D 5E66 27E4

* tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu:
  target/openrisc: Setup FPU for detecting tininess before rounding
  target/openrisc: Set PC to cpu state on FPU exception
  target/openrisc: Allow fpcsr access in user mode

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-13 11:23:14 +01:00
..
alpha target/alpha: Use MO_ALIGN where required 2023-05-05 17:05:58 +01:00
arm target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-12 16:01:25 +01:00
avr target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
cris target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
hexagon target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:28 +01:00
hppa target/hppa: Use MO_ALIGN for system UNALIGN() 2023-05-05 17:05:58 +01:00
i386 target/i386: Add EPYC-Genoa model to support Zen 4 processor series 2023-05-08 16:35:30 +02:00
loongarch target/loongarch: Do not include tcg-ldst.h 2023-05-11 09:53:41 +01:00
m68k target/m68k: Fix gen_load_fp for OS_LONG 2023-05-11 09:49:25 +01:00
microblaze target/microblaze: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
mips target/mips: Use MO_ALIGN instead of 0 2023-05-11 09:53:41 +01:00
nios2 target/nios2: Remove TARGET_ALIGNED_ONLY 2023-05-11 09:53:41 +01:00
openrisc target/openrisc: Setup FPU for detecting tininess before rounding 2023-05-11 15:40:28 +01:00
ppc tcg: ppc64: Fix mask generation for vextractdm 2023-05-05 12:34:22 -03:00
riscv target/riscv: add Ventana's Veyron V1 CPU 2023-05-05 10:49:50 +10:00
rx target/rx: Avoid tcg_const_i32 2023-03-13 06:44:37 -07:00
s390x target/s390x: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:28 +01:00
sh4 target/sh4: Use MO_ALIGN where required 2023-05-11 09:53:41 +01:00
sparc target/sparc: Use cpu_ld*_code_mmu 2023-05-05 17:09:47 +01:00
tricore target/tricore: Use min/max for saturate 2023-03-13 07:03:39 -07:00
xtensa target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:29 +01:00
Kconfig
meson.build